I see that nearly all of the messages posted here in the last year are just spam. Is anyone still watching this group? Are there other users of the FPU...
Hello, i have the fpu_v19 Version of the FPU. All arethmetic operations works, but not the multiplicate. I get a wrong result. For example: 10 000 000 * 1.212...
Hello; I will work with parallel architecture, That's why i need to know the development of code sources of microprocessor to choose a subsequent architecture...
Hi everyone! For the past few months I've worked on a comparison between the FPU and a Softfloat implementation in Java running on an Altera FPGA with JOP, the...
The instructions for getting test vectors suggest running timesoftfloat. However, that program was designed not to test the accuracy of the results, just to...
I've gotten the fpu-100 core to work using Modeltech (on Linux), but I haven't been able to get the included test-bench to work. This because of my limited...
Hello, This email message is a notification to let you know that a file has been uploaded to the Files area of the 32bit_fpu group. File : /fpu_v16.zip ...
Hi, The project website for fpu100 at opencores.org says that the fpu is pipelined. Does that mean that it is possible to give the next set of operands to the...
hi jidan . i am very much confused with the exception unit in floating point unit. we have to do seperate module for exception unit or we can combine the...
Hi All, I am trying to synthesis the FPU using standard cells. I am wondering if someone has had the chance to do it before using design_compiler from synopsys...
hi wonder if anyone has this working on a xilinx fpga and how mutch room it would take up spesificaly a xs3s400 i need to know how mutch room would be left for...
Hello together I am newbie in FPGA programming and after reading the theory and trying some small projects in Quartus II and the Cyclone EP1C6Q22408C I tried...
Hello Jidan Thank you for your response. I am using MS-Windows Professional. In Quartus, Version 5.0 I get the following messages: Info: Found 2 design units,...
Quartus II 4.0 with Service Pack 1.0 - Synthesis Tool. Program writen in C to run few thousands floating point tests. Arguments and expected results where...
hi all, when i am playing with the below progarm. i crossed all stages like simulation. but finally the synthesizer stopped me. so, my team players help me to...
HI I DIDNOT UNDERSTAND HOW TO GIVE THE EXPONENT VALUES. IF I WANT TO GIVE EXPONENTS AS exponent of a= 2**3 how to pass the values ? am i give 130 (= 3+127) or...
hi i studied ur material which is kept in this group. but i did not understood about left shift operation in add and div. Afrac=1.0000; Bfrac=0.0011; ...
hi all, i am doing a project on fft. in that i need to convert floating point i/p to binary. i written code by using REAL data type(VHDL) . it was simulated...
I have already send these questions to Jidan but i post them here for everybody. So, I'm actually trying to implement fpu100 on a actel fpga (synthesizing it...
hi jidan, ... multiplication is not working .Please notice that i am using Xilinx ISE 7.1 tool. I have tried my level best to do this by changing output ... ...
Hi, I can successfully synthesis the codes in Quartus II 6.0. But when I synthesize it in Quartus II 6.0 and Synlify Pro 8.5, I but the following error...
I have a doubt though. I was looking to the post_norm_addsub.vhd code. For me it is not clear when do you leave numbers denormalized. I mean, if you need a...
Note: forwarded message attached. ... Yahoo! Messenger with Voice. PC-to-Phone calls for ridiculously low rates. Hi, I can successfully synthesis the codes in...
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