Matt wrote:

> Hi guys,
>
> So I have two output compare interrupts setup such that the handlers
> look up in a circulating table (one for each handler) the state a port
> should be in and when the next interrupt should occur, then sets the
> port and loads the next interrupt into TC#. This table is dynamic
> based on user input. Anyway everything seems to work as I planned
> when interrupts are not occurring at a high speed rate and or close
> together. However, my needs are for a very close, sometimes the same
> time, interrupts. The issue (confusion) I'm experiencing is when I
> need two interrupts to occur at the same time and then the two same
> interrupts to occur again .1 mS later. So I know I'm limited by the


100uS is a lot even for 8MHz busclock. Your circulating table etc should
work.

> length of my interrupt handler, however here's the weird thing. I
> would expect in this scenario to see:
> OC_0 Interrupt occur at T(0mS)
> 0C_1 Interrupt occur at T(0mS+cycle time of OC_0_HANDLER)
> OC_0 Interrupt occur at T(.1mS, assuming cycle time <.1ms)
> 0C_1 Interrupt occur at T(.1mS+cycle time of 0C_0_Handler)
>

I see nothing wrong above.

> However what I see is this:
> OC_0 Interrupt occur at T(0mS)
> OC_0 Interrupt occur at T(.1mS)
> 0C_1 Interrupt occur at T(.1mS+some arbitrary time)
> 0C_1 Interrupt occur at T(.1mS+some arbitrary time+.1uS)
>

Let me guess, is this some arbitrary time close to 2^16 * timer_tick? I
think it's just a well known wrong flag-clear sequence. Show us your code,
at least show how are you clearing timer flags.

Edward


> So I haven't been a good engineer and calculated exactly the cycle
> time of the handlers, but I'm assuming since, even though in the wrong
> order, I see 0C_0 occur twice within the distance they're programmed
> to occur at, my cycle time is less than .1mS, which will suffice for
> my tolerance.
>
> Any ideas to why I might be seeing this?
> Thanks,
> Matt
>
>
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