Moderator, if this is not appropriate for this list, please delete and direct me to the proper place for this sort of question. Now, I'm modding the current...
... The 65816 is on the same address and data bus as the memory and lots of other parts of the C-One mainboard, therefore it will most probably not run at full...
Hi, A little problem with the C-One is that the 65816 is sharing the bus signals with the 128K SRAM. So for enabling the 65816 it would be easier if the SDRAM...
... Well, once I'm done modding, the core won't have much compatibility anyway. I'll have a try at using the SDRAM then. ... Ooh, I hadn't considered that....
Hi, nice to hear about such a thing. The pinouts should all be in the schematics of the C-One, which you can find under www.c64upgra.de. Expanding the color...
Hi All, Currently I'm working towards a new release of fpga64. As I don't have access to a (reliable) working c64 at the moment so I ask the group. (yeah I...
Hi, Somebody asked me for the program to test this. This one does the trick: 10 FOR I = 0 TO 255 20 POKE 56331, I 25 X = PEEK(56328) 30 PRINT I, PEEK(56331) 40...
Hi, Anyone have ported FPGA64 to others boards? I have one Altera DE1, and one Xport 2.0 + Gameboy Advance, but I am not engineer and just started playing with...
Thanx Chris, could you please run one other test for me? 10 poke 56331, 0 : print peek(56328) : print peek(56331) 20 poke 56331, 18 : print peek(56328) : print...
... I ported an earlier release to the Altium Nanoboard NB-1. I've been meaning to update to the latest version and port it to my latest hardware... Regards, ...
Hi All, I've made a new release of my PAL/NTSC C64 core called FPGA64. It's version 0.19 released on 20070508. Lots of CIA related fixes. release notes: ...
Hi All, I've made a new release of my PAL/NTSC C64 core called FPGA64. It's version 0.20 released on 20070512. Because the CIA timers are correctly working in...
Dear all, isn't it possible to use some space in the upper area of the 128k RAM for the color ram? I think, the upper 64k are only used as ROM area, right? ...
Hi Andre, ... There is about 40k free in the SRAM. Putting the color ram there takes 1 extra memory cycle so the VIC-II code needs to be changed so it allowes...
Hi, You may know this CF filesystem bug : when you add some files, they are not appear on the file-selector (mainly on the CPC core). I remember that Jens...
On 15.05.2007 at 15:31, Peter wrote: Hi Peter... ... This might be a new candidate for a high-end compatibility test-case in case of VIC-II tricks... ...
Hello Peter, another idea... In the fpga64 files, it is said, that the 6510 needs 4 cycles and that 20 cycles are unused. Is it possible to increase the CPU...
Hallo Peter, ... In what way? The only difference between the 6510 and the 65816, seen from the C64, is that the illegal instructions are missing. That does ...
Hi Ruud & Group, I was thinking in the same way a few month ago, but I have seen a couple of games that only run when illegal instructions are supported. ...
... I'm certainly no authority on fpga64, but I'd imagine if you multi-step the CPU independently of the rest of the system, you'll run into problems such as...
Hi, for sure, this might be a problem. If you write a register in the VIC and read it back immediately, you might not get the result, which you expect. But...
Dear all, can anybody (Tobias?) answer my questions? I hope so... - The flashsys0.70 contains the first 1541 emulation. What kind of? Is it Z80 code or 6502...
... Right, the way they (and Rossmöller's Flash 8 as well) handle it is to slow the CPU down to 1MHz whenever a peripheral register is accessed. This can...
Ok guys I have been reading your post for a while now. What do I need to get in to this? I miss having a c=64/128 Lee Subject: Re: [cone_cores] Re: Increasing...
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Spiro Trikaliotis
list-cone-cores@...
May 17, 2007 7:33 am
Hello Peter, ... I don't have real figures, but I think you are right that it is much more software (games and demos) than one would expect. Of course, when...
Dear all, the clock is directly routed to the cpu, I think. But the core is 32 MHz or something like that. Where is the runtime of the CPU controlled to only 4...
