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Messages 93 - 122 of 660   Oldest  |  < Older  |  Newer >  |  Newest
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93
Hi All, I've made a new release of my PAL/NTSC C64 core called FPGA64. It's version 0.21 released on 20070709. In this release a lot of improvements for the...
Peter
pwsoft2005
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Jul 9, 2007
10:04 pm
94
A first post here... I've just started playing with FPGA-64 in my new development board I've received a couple of weeks ago. It's a Xilinx/Digilent Spartan 3E ...
Magnus Wedmark
spartan3wiz
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Jul 10, 2007
8:43 am
95
Hi Magnus, For loading and saving games I run a 1541 drive emulator on the PC called 64HDD (there are others too). For the C-One it is simply connecting the...
Peter
pwsoft2005
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Jul 11, 2007
3:10 pm
96
Thanks for all your great advice Peter! ... Ahh ok I have a look at that, but it would be nice to have the card handle its own files. Maybe a MMC/SD-controller...
Magnus Wedmark
spartan3wiz
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Jul 11, 2007
4:12 pm
97
... Use this link instead... <http://jderogee.tripod.com/vhdl_SID_downloads/SID.zip> Time to update my port of your project... ;) Regards, --...
Mark McDougall
tcdevelop
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Jul 12, 2007
9:46 am
98
... Magnus/Peter, is the XESS board project (fpga64_xess_xsa3s1000.vhd) the most 'feature complete' version of the project? I ask because I'm currently...
Mark McDougall
tcdevelop
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Jul 12, 2007
2:27 pm
99
Mark McDougall wrote: Actually, I got it going... I'm using external SRAM for RAM btw... Now for the SID I guess... Regards, --...
Mark McDougall
tcdevelop
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Jul 12, 2007
3:08 pm
100
I was under the impression that the 'fpga64_cone.vhd' is just a suitable top-level for Alteras and that the "xess" is the same thing for Xilinx-devices.. Ohh...
Magnus Wedmark
spartan3wiz
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Jul 12, 2007
5:33 pm
101
Just though I would give a big YES, FPGA-64 now has a working SID. I've only tried the simplest BASIC-program but it sounds like in VICE. Now I want a way to...
Magnus Wedmark
spartan3wiz
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Jul 12, 2007
10:50 pm
102
Hi Peter, The link of the file is broken. http://jderogee.tripod.com/vhdl_SID_downloads/SID.zip regards Dirk...
Dirk Verwiebe
dirkverwiebe
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Jul 13, 2007
6:29 am
103
... I'm in the process of adding the SID myself... Wondering if you had the same problems as me with conflicts between IEEE.std_logic_arith and...
Mark McDougall
tcdevelop
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Jul 14, 2007
3:49 am
104
Same problem here with Xilinx ISE 9.2i. It seems the zip archive is incomplete. Regards Dirk...
Dirk Verwiebe
dirkverwiebe
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Jul 14, 2007
6:53 am
105
... They're trivial pwm adc/dac implementations. I have an audio DAC on my platform already, instantiated at the top level. So instead of using the DAC for SID...
Mark McDougall
tcdevelop
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Jul 14, 2007
7:28 am
106
... Woo hoo - working SID here too!!! <http://members.iinet.net.au/~msmcdoug/pace/platforms/platforms.html> I might have a look at implementing IEC+1541 within...
Mark McDougall
tcdevelop
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Jul 15, 2007
9:12 am
107
Hi All, With the recent discussions on porting the FPGA64 project, I though I would share some information about a IEC implementation I have used in the past. ...
Peter
pwsoft2005
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Jul 15, 2007
1:02 pm
108
Hi, i have managed to work the fpga64 core on my spartan 3 board,too. It is still without SID because i donīt know how to replace the missing parts in the SID...
Dirk Verwiebe
dirkverwiebe
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Jul 15, 2007
3:06 pm
109
External SRAM seems to be working. The next part will be the SID Core. Dirk...
Dirk Verwiebe
dirkverwiebe
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Jul 15, 2007
4:52 pm
110
... This might help... -- ... fpga64_XXX.vhd ... constant C64_HAS_SID : boolean := true; GEN_SID : if C64_HAS_SID generate BLK_SID : block signal sidData_s :...
Mark McDougall
tcdevelop
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Jul 16, 2007
12:08 am
111
... I should explain that I'm not using the DAC inside the SID, so clk_DAC and audio_out aren't used, and I punched out audio_data (voice_volume) to my top ...
Mark McDougall
tcdevelop
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Jul 16, 2007
12:16 am
112
Hi Mark, thank you very much for you help. The SID works now,the iec bus,too.So i can load programs for testing. In some games the sound is o.k. in other i.e...
Dirk Verwiebe
dirkverwiebe
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Jul 16, 2007
9:24 am
113
... The only test I've done is a 6-line BASIC program I found on the net that outputs a saw-tooth that decays after a few seconds. I'm yet to hook up anything...
Mark McDougall
tcdevelop
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Jul 16, 2007
9:51 am
114
The sram access on the c-one board is little different than the access of "normal" srams on fpga boards. I have used the part from peters fpga64 version for...
Dirk Verwiebe
dirkverwiebe
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Jul 16, 2007
10:07 am
115
... I'm trying to work out what the mainMemoryBus process is trying to achieve in the c-one version of the core!?! It would appear to me that it is...
Mark McDougall
tcdevelop
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Jul 16, 2007
10:42 am
116
Who have ported FPGA64 to Spartan-3E ou Altera DE1 boards? Cand anyone send me these ports? Thanks, Roni [Non-text portions of this message have been removed]...
Ronivon Costa
johny_2k
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Jul 16, 2007
11:21 am
117
Peters FPGA64 source packages contains a top-level design for the xess-xsa3s spartan 3 fpga board. With some small modification it works with other spartan 3...
Dirk Verwiebe
dirkverwiebe
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Jul 16, 2007
1:16 pm
118
I've got a stability problem with FPGA64 and I'm not quite sure where to start looking. I'm suspecting it has something to do with external SRAM, but I'm not...
Mark McDougall
tcdevelop
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Jul 17, 2007
1:04 am
119
... pressing ... Same behaviour like my spartan 3 board. I always have to press the reset button,too. The c-one core starts without a button press. On my board...
dirkverwiebe
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Jul 17, 2007
6:42 am
120
... Interestingly, the same project ported to an Altera EP2C35-based DE2 board runs from cold-configuration and appears to be stable. On my own EP2C35-based...
Mark McDougall
tcdevelop
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Jul 17, 2007
8:17 am
121
Would you send me your DE2 project files, so i can port it to my DE1 board and test it behaviour ? Most important for me is the top level...
Dirk Verwiebe
dirkverwiebe
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Jul 17, 2007
8:45 am
122
Hi, I've seen the reset failing on other boards. What you could try is increasing the number of reset periods during startup. It is a generic parameter on top...
Peter
pwsoft2005
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Jul 17, 2007
11:12 am
Messages 93 - 122 of 660   Oldest  |  < Older  |  Newer >  |  Newest
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