Please email me your resume at rkhanna@...
 
I am doing a search for a very senior architect level professional who comes
with
 
- Extensive experience in OS Internals( more on memory management,
thread/scheduling) and core kernel development
-proven track record of successful product role out
-WDM driver experience is highly desired.
 
NVIDIA's Kernel Mode Display Driver group is looking for an accomplished system
level software specialist to architect our kernel mode graphics driver. This
driver is critical to the success of NVIDIA' highly successful GPU business. The
performance and stability of this driver are of utmost importance and an
individual capable of identifying architectural weaknesses, foreseeing new
developments which will require re-architecture of the driver and designing and
driving those architectural changes.

The Kernel Mode Display Driver architect should have a very strong background in
architecting complex system level software. A strong background in the Windows
and Vista kernel and driver models is essential. Knowledge of CPU and GPU
architecture would be highly advantageous. This role requires excellent
communication skills and the ability to work cross group and cross discipline. A
key aspect of this job is interacting with NVIDIA' GPU hardware architects.

This is an exciting and challenging role and offers enormous potential for
positively impacting our business and customer experiences.

MINIMUM REQUIREMENTS
- BS in computer science with at least 8 years experience. MS or PhD in computer
science or related discipline is advantageous
- Proven track record architecting systems level software
- Strong systems software design and implementation skills
- Experience with Windows kernel and driver model
- Knowledge of CPU and/or GPU architecture
- Knowledge of graphics drivers and hardware is highly advantageous
- Excellent communication skills

EOE


[Non-text portions of this message have been removed]

CFP - 5th International Colloquium on Signal Processing & Its
Applications 2009



Dear Sir/Madam,

The Advanced Signal Processing (ASP) Research Group, Faculty of
Electrical Engineering, Universiti Teknologi MARA (UiTM) and UiTM IEEE
Student Branch, are proud to announce The 5th International Colloquium
on Signal Processing and its Applications (CSPA 2009) which will be
held at the beautiful and vibrant city of Kuala Lumpur, Malaysia, on 6
– 8 March 2009.

This event calls for local and international participations.  The
colloquium will provide an excellent platform for knowledge exchange
between researchers, scientists, academicians and engineers working in
the areas of automation, process, signal processing and analysis.  The
previous colloquiums has attracted international participants from
various countries, such as Canada, China, India, Iran, Malaysia,
Thailand, as well as various other countries.

Authors are invited to submit original, unpublished papers on all
aspects of signal processing including, but not limited to, the
following technical areas:

     * Sensors and sensing techniques
     * Artificial intelligent and optimization systems
     * Analytical/production techniques
     * Signal processing techniques
     * Industrial Electronics
     * Automation, robotics and control systems
     * Image processing and transformations
     * Bioinformatics
     * Geomatic engineering: "SEALANDAIR" digital imagery application
     * Other related areas

Interested participants may download the call for papers at
http://www.asprg.net/cspa2009/cfp/CFP1.pdf. Abstracts and full papers
may be submitted online at http://www.asprg.net/cspa2009.  We look
forward to your participation.

Please direct all your enquiries to:

Mohd Hezri Fazalul Rahiman
Faculty of Electrical Engineering
Universiti Teknologi MARA
Shah Alam, Malaysia

email: hezrif@...

phone:+6019-5114010

Thank you.

Please send your resume to rkhanna@...


NVIDIA Introduces Industry-Changing, Highly Integrated GPU

SOFTWARE QA ENGINEER (Apple / MAC)

RESPONSIBILITIES:
- Maintain and execute driver test plan on a daily basis
- Set up and maintain test system infrastructures
- Ad hoc testing of Macintosh applications
- Work closely with customer to track issues

MINIMUM REQUIREMENTS:
- 2+ years of Software QA experience or equivalent
- Excellent problem-solving and critical thinking
- Strong verbal and written communication skills
- Experience with 3D Graphics (OpenGL) and video codecs (MPEG-4, H.264, etc.)
highly desirable
- Hands-on experience with hardware and software configuration a plus
- Experience with Macintosh OSX and Macintosh hardware highly desirable
- Familiarity with Unix a plus

NVIDIA Introduces Industry-Changing, Highly Integrated GPU

Is your PC- Off Balance-http://www.nvidia.com/object/balancedpc.html 

[Non-text portions of this message have been removed]

 
Please send your resume to rkhanna@...
 
SR. BUILD & RELEASE ENGINEER
 
RESPONSIBILITIES
- Develop and maintain build scripts and build automation tools
- Generate driver, application, and BIOS packages for internal and external use
- Enhance builds and build processes to improve reliability, repeatability and
performance
- Help define and partition projects; execute on development initiatives;
communicate status
- Work as a team member in a complex dynamic environment
- Mentor junior engineers and interns

MINIMUM REQUIREMENTS::
- BSEE/CS and 5+ years experience with builds or equivalent
- Excellent Perl and script-based design abilities
- Experience with distributed build systems
- Expertise with Windows OSes
- Strong organizational and communication skills; detailed, thorough, and
methodical

PREFERRED QUALIFICATIONS:
- Expertise with C/C++/python
- Expertise with virtual/VMWare builds
- Experience with IT and system engineering including .net systems
- Experience with UNIX/Linux
 
Is your PC- Off Balance-http://www.nvidia.com/object/balancedpc.html 

[Non-text portions of this message have been removed]

 Please send your resume to rkhanna@...
 
SR. SOFTWARE QA ENGINEER #1135410

RESPONSIBILITIES:
- Responsible for the design, implementation, and advocate for software quality
processes and standards for our Windows/Linux software. This includes providing
QA support to the development team with testing, problem reporting and analysis.
- Work closely with development and program managers to analyze new software
features in order to create use cases, test data and plans that ensure
features/functionality are validated and meet all current and future
requirements.
- Ability to work and thrive within a small team reaching for maximum results
- Self starter who can integrate and work under fast, dynamic conditions

MINIMUM REQUIREMENTS:
- Extensive working knowledge of the Windows/Linux environment and system
building
- 5 - 8 years of software / hardware testing experience
- Good working knowledge of graphics and OpenGL API within Linux/Windows
- Excellent verbal and team skills
- Experience writing test plans

EOE


[Non-text portions of this message have been removed]

Please send your resume to rkhanna@...

1134594-SENIOR SOFTWARE ENGINEER(System Software/Display Driver Development),
NVIDIA. Santa Clara,CA

RESPONSIBILITIES:

- As a Senior Software Engineer at NVIDIA, you will work on Display Driver
Development for PC graphics.
- Develop and maintain SW technologies targeted at enabling and supporting
NVIDIA's graphics hardware:
* on the current and upcoming Windows based operating systems
* insuring the best performance and feature set
* for providing advanced power and device control capabilities
- Resolving engineering problem reports
- Supporting new HW graphics architectures along multiple design phases:
emulation, simulation and chip bring-up
- Working with other internal teams (software, hardware, architecture, OEM
support)

MINIMUM REQUIREMENTS:
- Bachelor's degree in Computer Science, Electrical Engineering, or Computer
Engineering.
- 3+ years of industry experience
- Strong programming skills in C and C++
- Software engineering abilities: requirements and operations analysis, software
design and coding
- Experience with source control tools and standard programming practices a
must.
- Demonstrable knowledge of O/S internals.
- Strong written and oral communication skills to interface with other engineers
- Debugging and problem solving aptitudes
-
Driver coding experience, practical understanding of PC architecture,
or O/S system software (Windows internals and other OS fundamentals)
experience.
- An ideal candidate should be comfortable working in a
team and have the commitment to deliver high quality software on
schedule



Is your PC- Off Balance-http://www.nvidia.com/object/balancedpc.html


[Non-text portions of this message have been removed]

Please send resume to rkhanna@...

Kernel Mode Display Driver Architect <>1134588

NVIDIA's Kernel Mode Display Driver group is looking for an
accomplished system level software specialist to architect our kernel
mode graphics driver. This driver is critical to the success of
NVIDIA's highly successful GPU business. The performance and stability
of this driver are of utmost importance and an individual capable of
identifying architectural weaknesses, foreseeing new developments which
will require re-architecture of the driver and designing and driving
those architectural changes.

The Kernel Mode Display Driver architect should have a very strong
background in architecting complex system level software. A strong
background in the Windows and Vista kernel and driver models is
essential. Knowledge of CPU and GPU architecture would be highly
advantageous. This role requires excellent communication skills and the
ability to work cross group and cross discipline. A key aspect of this
job is interacting with NVIDIA's GPU hardware architects.

This is an exciting and challenging role and offers enormous
potential for positively impacting our business and customer
experiences.

MINIMUM REQUIREMENTS
· BS in computer science with at least 8
years experience. MS or PhD in computer science or related discipline
is advantageous
·         Proven track record architecting systems level software
·         Strong systems software design and implementation skills
·         Experience with Windows kernel and driver model
·         Knowledge of CPU and/or GPU architecture
·         Knowledge of graphics drivers and hardware is highly advantageous
·         Excellent communication skills


[Non-text portions of this message have been removed]

Our client located in Redmond WA is currently seeking a Micro-
electronic Technician for a 90 day contract. This company designs
and manufactures high-density, high-reliability electronics for
aerospace, space, military, medical, industrial, and commercial
applications. From Mars Rovers to implantable defibrillators; from
submarines to fighter jets, their products have proven their ability
to operate in the most demanding environments


We have a unique career opportunity for Engineering Technician III.

Key Responsibilities:
As an Engineering Technician III you will build, test and/or
troubleshoot products and prototypes under the direction of the
responsible engineer. You will work from written and verbal
instructions, engineering change notices, drawings and established
operation procedures. You are responsible for the following:

o Precise and accurate analysis and check-out of circuits,
components, mechanical items, hardware and other items for form,
fit, and function.

o Set-up, calibration, testing and troubleshooting of circuits,
components, instruments and mechanical assemblies.

o Programmable auto-testers, oscilloscopes, pulse generators,
meters, power supplies and special test fixtures.

o Analysis and presentation of test data.

o Train and mentor other technicians.



Minimum Requirements:

o 4+ years related experience as an Engineering Technician.

o Associate's Degree in a technical discipline (preferably
electronics).

o Hybrid and analog electronics background.

o Demonstrated experience documenting and organizing test data and
lab notes.

o Demonstrated experience troubleshooting and conducting root cause
analysis.

o Ability to perform assembly tasks using hands as well as a variety
of tools.

o Knowledge of MS Outlook, Excel and Word.

o Ability to pass directed certifications.

To apply to this position please send a resume to
whittsj@...

Please send me your resume at rkhanna@...

SOFTWARE ENGINEER #1134525

NVIDIA is searching for world-class software engineers to join the
NVIDIA networking software team. Successful candidates will be working
in a very dynamic and rewarding environment to design and develop
networking software for NVIDIA's Media Communications Processor (MCP),
a key motherboard component providing high-speed system performance,
advanced networking, and unparalleled storage solutions to both AMD and
Intel platforms.

RESPONSIBILITIES:
- Design and implement kernel level drivers and software for networking.
-
Use your experience in operating systems and hardware fundamentals to
support development of next generation networking solutions.

MINIMUM REQUIREMENTS:
- BSEE/CS or equivalent
- 2 years experience in developing Kernel mode device drivers on Windows.
- Detailed knowledge of operating system internals , C language, as well as
various device driver models.
-
Must be able to work closely with both hardware designers as well as
other driver engineers to design, develop, and debug functional and
performance aspects.

DESIRED EXPERIENCE:
- NDIS, TCP/IP, Ethernet.
- Linux kernel mode driver.

EOE

Is your PC- Off Balance-http://www.nvidia.com/object/balancedpc.html


[Non-text portions of this message have been removed]

Call for Paper
 
International Journal of Imaging (IJI)
http://www.ceser.res.in/iji.html
ISSN 0974-0627
 
The main aim of the International Journal of Imaging (ISSN 0974-0627) is to
publish refereed, well-written original research articles, and studies that
describe the latest research and developments in the area of imaging. This is a
broad-based journal covering all branches of imaging, it’s application in
technology and interdisciplinary research. International Journal of Imaging
(IJI) is a peer-reviewed online journal and is published in Spring and Autumn
i.e. two times a year. The areas of interest include but are not limited to:
Image processing & reconstructions,
Statistical Imaging & Tomography,
Signal Processing
Magnetic Resonance Imaging (MRI) & Magnetic Resonance Tomography (MRT),
Positron Emission Tomography (PET),
Inverse Problem & Imaging,
Reconstruction, Restoration, and Enhancement,
Image Understanding, Tracking, Segmentation and Classification,
Face Recognition and Facial Expression Analysis,
Human-Machine Interfaces,
Image Acquisition and Calibration,
Pattern Analysis and Recognition,
Virtual Reality and Augmented Reality,
Feature Extraction and Detection,
Neural Networks,
Speech Processing,
Telecommunication,
Filters, Algorithms, Video Coding and Watermarking,
Video Processing and Analysis,
Data Modelling and Visualization
Telecommunication
Geographic Information Systems (GIS) & Geophysical Diffraction Tomography (GDT),
Modelling, Simulation and Control,
Seismology,
Bio-Medicine,
Artificial Intelligence,
Geographic Information Systems (GIS) & Geophysical Diffraction Tomography (GDT),
Education, Databases & Knowledge Engineering,
Internet and Applications,
Parallel and Distributed Computing and
Inter-disciplinary nature of applications.
Manuscripts can also be sent to the Editor-in-Chief International Journal of
Imaging, via e-mail (tavares[at]fe.up.pt). Detailed instructions on how to
prepare your manuscript are available at Author Instructions
http://www.ceser.res.in/iji.html.
 
Sincerely,
 
João Manuel R. S. Tavares
Editor-in-Chief
International Journal of Imaging (IJI)
http://www.ceser.res.in/iji.html
E-mail: tavares[at]fe.up.pt




[Non-text portions of this message have been removed]

Please send your resume to rkhanna@...
 
We are open to consider someone who have even networking background…
 SOFTWARE MANAGER, GPU DRIVER TEST DEVELOPMENT #1083130

NVIDIA is hiring a strong manager for the Santa Clara core GPU display driver
team. You will develop a team of highly skilled and motivated engineers focused
on the quality development of our Windows drivers. This is a hands-on
development position. You will work with various software teams and senior
management to define, plan, develop and execute the key testing components of
NVIDIA?s GPU Windows drivers. Your success directly impacts millions of users.

RESPONSIBILITIES:
- Evangelize test development and design for testability within the core
software development teams.
- Drive change in the evolving process in the design, development, and
implementation of high quality robust kernel mode device drivers.
- Must identify, propose and drive testing and development initiatives for
quality designs and code development.
- Develop, document, prioritize, and review test plans with NVIDIA?s SQA
organization.
- Develop aggressive but realistic engineering plans aligned with key
objectives.
- Drive the operations and growth of the core test development team (6+
engineers). This includes mentoring and career development, performance reviews,
goal setting and team measurement. Some team members will be remote.
- Work with the core software development managers to design, develop, and debug
functional and performance aspects of graphics subsystems.
- Must define and measure key quality development metrics.

MINIMUM REQUIREMENTS:
- BSEE/CS or equivalent
- 7 years of experience in developing system software products.
- 10 years in a software leadership role.
- Strong organization and communication skills.
- Solid understanding of the tradeoffs needed for delivering quality software
components.
- Detail oriented with proven ability to multitask in a fast moving environment
with shifting priorities and changing requirements.
- Proven record of managing software projects with interrelated dependencies in
a very dynamic development environment. Must have prior experience demonstrating
?out-of-the-box? thinking.
- Knowledge of operating system internals, C/C++ language, PC architecture,
Windows device drivers, 2D/3D graphics, ACPI, power aware design, remote
debugging, and experience with prototype hardware is invaluable. 



 
Is your PC- Off Balance-http://www.nvidia.com/object/balancedpc.html 

[Non-text portions of this message have been removed]

Hello DSP Engineers,
    If you are considering contract opportunities in the Philadelphia,
PA suburbs doing Senior Digital Design Engineering, please send your
resume to sean@....   Here is a brief job description...

Thank you.

Sean Handforth
Aavalar Consulting
sean@...

JOB REQUIREMENTS

Skills and Requirements:
" High Speed Digital Design
" Proficient in VHDL
" Proficient in EPLD/FPGA design
" Strong DSP Design Experience
" Strong experience with Matlab and Simulink Digital and DSP
design toolboxes
" Microprocessor/controller design experience
" Organized and disciplined circuit designer - self motivated
" Adept at leading communications with customers pertaining to
complex technical concepts, product details, and problem
discussion/resolution in a confident and professional manner.
" Solid problem solving and analytic skills
" 8-10 yrs in field
" BSEE required, MSEE preferred

Please email your resume to rkhanna@...
We have multiple position in the following areas....please feel free to forward
this email to anyone who you feel is qualified in these areas...
Thease are all development positions.
	 * WDDM (Windows Display Driver Model)
	 * KMD (Kernel Mode Driver)
	 * WDM (Windows Driver Model)
	 * WDF (Windows Driver Foundation)
	 * KMDF (Kernel Mode Driver Framework)
	 * NT or XP or Vista Drivers
	 * WinDbg
	 * Memory management
 
Is your PC- Off Balance-http://www.nvidia.com/object/balancedpc.html 

[Non-text portions of this message have been removed]

Client : Telecom Opportunities in chennai
            and bangalore
Description:
Three or more years of network protocol development, including one or
more of the following protocols: GMPLS, MPLS, OSPF, RSVP. Experience
with the DCL protocol stack preferred. Experience developing ASON/
GMPLS Control Plane capability for optical communication equipment
preferred. Strong programming in C/C++ is required.
Location : Chennai.
Bangalore Openings:
Requirements
Quality Assurance:
0.  Generic Requirements for our QA personnel:
  Knowledge of routing, bridging, MPLS, and QoS
  Able to troubleshoot routing/MPLS/L2 problems
  Experience with gigabit routers (Riverstone, Cisco, Juniper, Nortel,
etc)
  Willing to automate test cases in Tcl
  Experience with different media (Ethernet, POS, ATM, T3/E3) much
preferred
  Lives to find flaws in the software and hardware!
  Service Provider experience plus QA experience is highly preferred
  Experience with test tools like IXIA, Smartbits, Adtech, etc.
  Excellent communication skills
  Ability and willingness to be fully responsible for our product
quality
1.
Router QA Engineer
  2+ years experience
  Technically proficient in routing, bridging, MPLS, WAN QA
  Able and willing to mentor engineers
  Proven creative approach to simulating complex scenarios
  Real-world experience (ISP, NOC, Network design and implementation)
2.
L2 QA Engineer
  2+ years experience
  Strong knowledge of L2 protocols (STP/RSTP/802.1s, LACP, GVRP,
802.1ad)
  Tested L2 features on switching routers/bridges
  Experience with WAN protocols/media preferred
  Understanding of scalability and performance metrics and
limitations
3.
MPLS QA Engineer
  2+ years experience with Routing protocols
  2+ years experience with MPLS
  Knowledge of MPLS, RSVP, LDP, FRR, MPLS QoS
  ATM/Frame Relay background preferred
4.
Routing QA Engineer - Multicast
  2+ years experience in Routing protocols
  Knowledge of DVMRP, IGMP, PIM-SM, PIM-SSM, MSDP
  Expertise in IXIA, Adtech and other test tools
  Knowledge of QoS in multicast networks
5.  Systems Software QA Enginers
    2+ years in testing Complex OS, drivers, network processors etc.
    Knowledge of QoS, ACLs, and hardware architectures
    Knowledge of high speed, distributed, redundant processing switch
designs
    Proven ability to find, reproduce and characterize complex
problems
    Proven ability to characterize scalability and performance
Level of Experience: 3 yrs or above
 
Position: Senior Software Engineer.
 
Desired Experience:
Should have working experience in Layer 2 Control protocols (STP (802.1d)/RSTP
(802.1w), LACP(802.3ad),
Provider Bridges (802.1ad) and Layer 2 Data plane (vlan (802.1q))
 
Should have working knowledge in VPLS/MPLS
 
Should be proficient in C programming.
Should be proficient in RTOS (Nucleus/VxWorks)
 
Interested candidates ,pls respond with the following details :
Current CTC,Expected CTC and Notice Period
Interested Candidates mail us : guardianmanagement@...



Meet people who discuss and share your passions. Join them now.


       Bring your gang together. Do your thing. Find your favourite Yahoo! group
at http://in.promos.yahoo.com/groups/

[Non-text portions of this message have been removed]


--- On Fri, 13/6/08, Monisha rodrigo <monirodrigo@...> wrote:

From: Monisha rodrigo <monirodrigo@...>
Subject:
To: it-telecom-jobs@yahoogroups.com, itrecruitments@yahoogroups.com,
job_4_friends@yahoogroups.com, job_openning_chennai@...,
job-seeker@yahoogroups.com, jobconsultant@yahoogroups.com,
jobforall@yahoogroups.com, jobgalaxy@yahoogroups.com, jobmine@...,
jobs-in-india-4-indians-abroad@yahoogroups.com, jobs4gd@yahoogroups.com,
jobs4uanywhere@..., jobs99@yahoogroups.com,
JobsforEmbedded@yahoogroups.com, jobsguruji@yahoogroups.com,
jobunion@yahoogroups.com, l2-l3_protocols_jobs@yahoogroups.com,
latest_it_jobs@yahoogroups.com, lathahr_com@...,
linuxlobs@yahoogroups.com, modbus_developers@yahoogroups.com,
mpls@yahoogroups.com, mplsdssgroup@yahoogroups.com,
net5working_job@yahoogroups.com, network_india@...,
networkahmedabad@..., networking_cvi2@yahoogroups.com,
networking_jobs_usa@yahoogroups.com,
networking_telecommunication@yahoogroups.com, networkking@...,
  onestop_jobs@yahoogroups.com, opengl-api-dev@yahoogroups.com,
protocol_ambitions@yahoogroups.com,
protocoldevelopersandtesters@yahoogroups.com,
protocols_tcp_ip_jobs@yahoogroups.com, rahzamkhan@yahoogroups.com,
ramsol-it-jobs@yahoogroups.com, Rational_Users_jobs@yahoogroups.com,
refer_a_position@yahoogroups.com, routingprotocols@yahoogroups.com,
simplenetworkmanagementprotocol@yahoogroups.com, sitmmpls@...,
SM-SoftProg@yahoogroups.com, snmp_job2003@yahoogroups.com,
snmp-ebmedded-jobs@yahoogroups.com, STP2007_group@yahoogroups.com,
switch_engineers@yahoogroups.com, systemjobs@yahoogroups.com,
tcpip_protocols@yahoogroups.com, TECHCIRCLE@yahoogroups.com,
telco_jobs_in@yahoogroups.com, telecom_experts@yahoogroups.com,
telecom_it_jobs@yahoogroups.com, telecom_jobs_bangalore@...,
telecom_jobs_india@..., telecom_jobs@yahoogroups.com,
telecom_software_jobs@yahoogroups.com,
telecom_software_professionals@yahoogroups.com,
  telecomm2001@yahoogroups.com, telecommates@yahoogroups.com,
telecomprofessionalsindia@...,
telecomwave_engineers@yahoogroups.com, TheTelecomJobs@yahoogroups.com,
unix_sun_solaris@..., voicexml@yahoogroups.com,
voip_telecom_domain_jobs@...,
voip_telecom_l2-l3_l4protocols_wlan_jobs@yahoogroups.com,
voip_telecom_ooad_oss_jobs@yahoogroups.com, voipjobs@yahoogroups.com,
vxml-jobs@yahoogroups.com, wadhwajobs_bangalore@yahoogroups.com,
wap_jobs@yahoogroups.com, wapjobs2@yahoogroups.com, wifiug@yahoogroups.com,
wireless_baseband@yahoogroups.com,
wireless_network_test_equipment_jobs_india@yahoogroups.com,
wireless_tech_jobs@yahoogroups.com, wireless-jobs@yahoogroups.com,
wireless4u@yahoogroups.com, wirelessgroupcontacts@yahoogroups.com,
wirelessjobland@yahoogroups.com, wirelessjobs-community@yahoogroups.com
Date: Friday, 13 June, 2008, 2:58 PM

Arithos Designs is offering industry oriented training in following
areas

1. digital signal processing.
2. digital image processing.
3. digital design.
4. verilog coding and simulations.
5. spice circuit simulations.
6. matlab.

The classes are running in Bangalore. Intrested students/corporates
can contact us at bharat@... or call 91-80-25234640
visit www.Arithos.com

Regards
Bharat

I am hoping someone can send me in the right direction for this
signal processing question, or even   supply  a simple answer. What
I have is an elementary problem in signal processing, but am
unfamiliar with how to approach the problem correctly.

I have a two part question that has been bothering me for some
years, and only recently have I been told that the answer falls
within the field of signal processing. hence I've joined the group.
I am hoping you might supply me with the two part answer; the answer
may simply be to take the mean of each segment as the best estimate,
which is what I'm guessing, but first let met state the question.

THE QUESTION:
I have a "desired signal" of fixed length I am interested in. It can
be broken into M linear component pieces. S = {S1, S2, S3, ...SM}
Next, I have N samples of observations of this desired signal. Let
us call each of them Xi. Each can be decomposed into M linear
segments as well.
An example of a desired signal might be the shape of the "average
Friday" trading day of a stock index made by  15 minute bars spaced
evenly throughout the day.
I may wish to find what the "average Friday" trading day looks like,
the desired signal, and may have 30,40, 50 etc. (N=number of
observations) past Fridays I can use to derive this chart.

My FIRST question is how to derive the signal S that looks  like the
most expected, so-to-speak, signal pattern shape. Not necessarily
the average pattern but "most likely" based on  common repetiveness.
Do I simply average all the observations for each piecewise segment,
or is it better to compute a linear combination of observations to
derive the desired signal, or is there yet another mathematical
technique possible (and what is it, such as maximum likelihood) that
would produce the desired signal? If the goal is to derive the most
probable expected signal shape, which might mean eliminating
observations that look very different than others that  are looking
very similar to one another, how should I do that? Second, what
measure can I produce that would tell me how close the various
observed signals in the observation set look to one another?

In other words, I can think of two scenarios that might answer the
question, but I don't know if either is best:
1) Take the average of all samples to produce the best estimate for
section S1 of the desired signal
S1 = ( x1,1 + x2,1 + x3,1 + ... xn,1 )/n    for segment 1
S2 = ( x1,2 + x2,2 + x3,2 + ... xn,2 )/n    for segment 2
...
SM = ( x1,m + x2,m + x3,m + ... xn,m )/n    for segment m

2) Take a linear combination of the samples to produce the best
estimate for the sections S1...SM of the signal. Coefficients a,b,c
are the same for all equations.
S1 = a* x1,1 + b* x2,1 + c* x3,1 + ...  k* xn,1
S2 = a* x1,2 + b* x2,2 + c* x3,2 + ...  k* xn,2
...
SM = a* x1,m + b*x2,m + c* x3,m + ... k* xn,m

Is there another method that would provide a better estimate of the
signal shape S that would get rid of outlier observations that
really do not look like all the others? What methodology would
derive the most probable looking  pattern for this Friday, for
instance, of stock market trading given independent observations of
previous Fridays or observations of other data sets expected to be
most like Friday's signal pattern?

QUESTION #2
The second question is the following: what measure can I produce
that would tell me how close the observed signals look like one
another? In other words, is there a measure of fitness I can use if
I take some mathematical formula to compute a desired signal, and
that fitness measure (such as a sum of squared errors) would tell me
how close the observations look like one another?

I can restate the question another way. Given various subsets of
observations, is there some measure I can compute for each group
that tells me the individuals in one set look more like each other
than the individuals in another set?  That way I can tell if one set
is superior in predicting the signal shape S since most of its
members look more closely like each other than any other set I can
come up with.

For instance, let us take the  intraday shape of trading for a stock
index once again to make matters clear. Let's assume that I have
various independent groups of data that I believe may look like this
coming Friday's shape, which is what I want to predict. One group of
estimates of the day's trading pattern might be 30 Fridays. If this
Friday is a pre-holiday, perhaps I have 20 other pre-holidays  I can
put in a group and use the answer from #1 to derive an expected
signal. Or perhaps Friday is a Federal reserve announcement day, and
I have 40 such instances that can be put in a group. Or perhaps I
have 60 days where the trading bar pattern shape on Thursday did
something special, and since that's what happened so I expect a
similar follow-up of that set for Friday.

Let's say I have multiple different subsets of days I can use to
guess/estimate what tomorrow's trading day will look like, the
desired signal S. If in looking at these various groups I find one
where the group members looked more alike each other than for other
groups, that might be the desired signal prediction for the day in
question. It would then be a question of trying different
classification schemes to see which ones came up with closest fits
of member shapes to one another, so-to-speak. My question is, what
one or two mathematical measures can I compute that will tell me how
close the members within a set most looked like one another (which
might mean how closely the derived signal curve best fit the
observations)? Is that possible?

I realize this is not an typical DSP question, and perhaps is too
basic, but it has bothered me for years searching for a way to even
describe the question, and only recently did I find that this falls
within the field of signal processing. Would someone be so kind
enough as to provide a possible answer.

Hi members,

I wanted to make two comments.

1)  Is there a recruiting firm you can recommend that specializes in
DSP recruiting?

2)  My client, Plantronics, is looking for a Director of Audio DSP
Engineering for their offices in Santa Cruz, CA.

If you're interested or have any suggestions, please email me at
misterrecruiter@...

Thanks

Please send your resume to cford@...



SENIOR UNIX SYSTEM ADMINISTRATOR #1040002
- Senior Unix administrator (5+ years preferred).
- Significant experience with any flavor of Linux.
- Significant experience with Perl, C, and shell programming.
- Experience with NIS and automounter.
- TCP/IP networking fundamentals
- DNS administration


UNIX STORAGE ADMINISTRATOR #1057453
A solid, thorough understanding and experience with:
- Network Appliance hardware
- Network Appliance software suite namely, Data ONTAP
- NAS/SAN heterogeneous environments
- Fiber Channel/iSCSI/PATA/SATA
- NFS and the Linux automounter
- Data replication / Disaster Recovery
- Veritas Netbackup
- Capacity Planning
- Performance analysis and troubleshooting
- Evaluation of other storage technologies

DESIREABLE SKILLS:
- Perl programming experience
- Shell scripting and automation of repetitive tasks
- Unix/Windows interoperability and CIFS file sharing
UNIX SYSTEM ADMINISTRATOR #1064024
- Must have experience supporting and managing large numbers of servers
including hardware and software troubleshooting and maintenance.
- 3 to 4 years of overall Unix/Linux experience.
- 1 year experience in scripting including Perl and Shell scripting. Perl
scripting is highly desirable.
- Network Monitoring experience such as Netsaint/Nagios, HP Openview, and SNMP
- Must have excellent communication skills.
- Ability to practice good judgment in dealing with unforeseen issues that may
arise.
- Willingness to take on any task and drive it to completion.
- Participate in 24 x 7 on call support.


[Non-text portions of this message have been removed]

Req 1047070 - Job Description
SENIOR QA ENGINEER, 3D GRAPHICS #1047070

The top 3 requirements for this positions are

1. This candidate must have background/experience in Direct 3D either
development or testing and also having some knowledge in openGL is ideal.
2. Understanding how chips are developed or some computer architecture
experience is preferred.
3. QA Process knowledge and ability to lead Qa Projects is a plus

NVIDIA is looking for a senior QA engineer with experience working with 3D
graphics hardware, drivers, and/or software. This is an exciting opportunity to
work with nVidia's world class GPU and software offerings that are the heart of
visual computing.

Once on-board, this technical leader will partner with his manager and other
senior engineers in driving improvements into the 3D testing process in terms of
both effectiveness (coverage) and efficiency (scale). This leader will also
drive improvements into the test planning process by working with nVidia's
industry leading development organization to assure that our testing is enhanced
using a broader range of testing techniques. For example, the addition of white
or gray box testing to the validation process to augment the unit and black box
testing already being performed.

Specific duties include reviewing of product specifications and requirements
required to create comprehensive and effective test plans, test case definition
and creation, and expansion of current testing to such areas as API or other
directed testing.

MINIMUM REQUIREMENTS:
- BSCS or BSEE required, Masters preferred.
- Candidates should be senior level QA or development engineers with a minimum
of five years experience or the equivalent in a 3D graphics hardware or software
environment.
- Experience programming in Perl and C or C++ a plus as the ability to read
driver and other software source code will be required.

EOE

[Non-text portions of this message have been removed]

Please send your resume to rkhanna@...

EMBEDDED QA ENGINEER #1041272

Candidate will help in developing and executing test plans, modifying existing
test infrastructure and assist in creating new test suites as needed to
implement the plan.
Position offers candidate mid level responsibility for s/w quality across the
entire embedded software organization. Candidate is expected to help create and
assist in maintance of high quality standards within the group.

MINIMUM REQUIREMENTS:
- QA background; test infrastructure and analysis skills
- General script language (perl, bash) expertise
- Experience with Linux required, other embedded OS experience a plus
- Excellent communicator, both written and verbal
- Graphics and/or multimedia test experience a plus
- Familiarity working with embedded hardware a plus
- C/C++ coding at the application level a plus

EOE



EMBEDDED SOFTWARE QA ENGINEER #782948

Candidate responsible for architecting, designing, and implementing Q/A
infrastructure and running operations. Will have a leadership role in working
with engineering, marketing, manufacturing, and internal support groups
world-wide to ensure that our software products are produced and tested in a
consistent, effective manner.

Candidate will develop and execute a quality and testing plan, modifying
existing test infrastructure and creating new test suites as needed to implement
the plan. Will design and maintain an automated testing plan for both releases
and engineering check-ins, working with in-house check-in validation team.

Position offers candidate high level responsibility for s/w quality across the
entire embedded software organization. This is a design and programming
position, requiring strong architecture and coding skills, as well as ownership
of department?s quality strategy and methodology. Candidate is expected to
design and create test infrastructure and methodology, and create automation to
satisfy testing, building, and quality requirements, and to write tests.

MINIMUM REQUIREMENTS:
- QA background; test infrastructure and analysis skills
- Good script language (perl, bash) expertise
- Experience with Linux required, other embedded OS experience a plus
- Excellent communicator, both written and verbal
- Graphics and/or multimedia test experience a plus
- Familiarity working with embedded hardware a plus
- C/C++ coding at the application level a plus

EOE


EMBEDDED SOFTWARE QA ENGINEER #1056572

Candidate responsible for architecting, designing, and implementing Q/A
infrastructure and running operations. Will have a leadership role in working
with engineering, marketing, manufacturing, and internal support groups
world-wide to ensure that our software products are produced and tested in a
consistent, effective manner.

Candidate will develop and execute a quality and testing plan, modifying
existing test infrastructure and creating new test suites as needed to implement
the plan. Will design and maintain an automated testing plan for both releases
and engineering check-ins, working with in-house check-in validation team.

Position offers candidate high level responsibility for s/w quality across the
entire embedded software organization. This is a design and programming
position, requiring strong architecture and coding skills, as well as ownership
of department?s quality strategy and methodology. Candidate is expected to
design and create test infrastructure and methodology, and create automation to
satisfy testing, building, and quality requirements, and to write tests.

MINIMUM REQUIREMENTS:
- QA background; test infrastructure and analysis skills
- Good script language (perl, bash) expertise
- Experience with Linux required, other embedded OS experience a plus
- Excellent communicator, both written and verbal
- Graphics and/or multimedia test experience a plus
- Familiarity working with embedded hardware a plus
- C/C++ coding at the application level a plus

EOE


EMBEDDED SOFTWARE QA ENGINEER #1056573

Position offers candidate mid level responsibility for s/w quality across the
entire embedded software organization. Candidate is expected to help create and
assist in maintance of high quality standards within the group.

MINIMUM REQUIREMENTS:
- QA background; test infrastructure and analysis skills
- General script language (perl, bash) expertise
- Experience with Linux required, other embedded OS experience a plus
- Excellent communicator, both written and verbal
- Graphics and/or multimedia test experience a plus
- Familiarity working with embedded hardware a plus

[Non-text portions of this message have been removed]

Please send resume to rkhanna AT NVIDIA dot com

EMBEDDED SYSTEMS SOFTWARE ENGINEER #1046001

RESPONSIBILITIES:
- Design and implement low-level device firmware for general-purpose embedded
processors
- Communications periphery (I2C, UART, DMA) support
- Real-time operating system design, implementation, and support
- Assist core driver development team with higher-level driver development
activities and maintenance
- Design and implement engineering-support tools to facilitate embedded
debugging activities

MINIMUM REQUIREMENTS:
- B.S. in Computer Engineering or Computer Science
- Thorough knowledge of C is required
- Experience in developing low-level device drivers or embedded applications
- Comprehensive operating-system knowledge
- Familiarity with real-time operating systems
- Detailed knowledge of at least one of the following processor architectures:
ARM, x86, PowerPC
- Ability to multitask
- Excellent communications skills
- Ability to work with cross-functional teams and customers

PREFERRED QUALIFICATIONS:
- Kernel Mode Driver development experience
- Cross OS platform development experience
- Experience with Board Support Packages (BSP)
- Working knowledge of boot loaders and bootstrapping techniques
- Knowledge of C++ and Perl
- Experience using GDB, DDD, WinDbg, SoftIce, JTAG debuggers, In-circuit
emulators
- Experience with code profiling and optimization




SENIOR SYSTEM SOFTWARE ENGINEER #904559

NVIDIA is hiring engineers to work in our system software engineering groups.
The best candidates will have strong C programming skills, a thorough
understanding of operating systems and kernel programming, knowledge of Windows,
a good understanding of hardware architecture, superb debugging skills, and
excellent communication and planning skills. You will work closely with other
software engineers to design, develop, and debug many functional aspects of our
multimedia accelerator devices. You will also work with hardware engineers for
architecture and design of business specific features. You will follow the
devices all the way from the development process to the customer desktops,
notebooks, workstations, and gaming console products that are used throughout
the world.

MINIMUM REQUIREMENTS:
- BS or higher degree in Computer or Electrical Engineering, Computer Science,
or related degree
- 5+ years of systems software experience.
- Excellent C programming skills
- Hands on experience with Windows device drivers a big plus
- Familiarity with computer system architectures and the hardware/software
interface layer models
- Understanding of system concepts including interrupts, exceptions.
- Interest in low-level operating system knowledge, including memory/resource
management, scheduling and process control, and hardware virtualization
- Should be able to use tools like JTAG, ICE and scopes.
- Experience with complex system-level debugging is invaluable
- Emulation and simulation experience is invaluable.

EOE



SENIOR SYSTEM SOFTWARE ENGINEER #904925

NVIDIA is hiring engineers to work in our system software engineering groups.
The best candidates will have strong C programming skills, a thorough
understanding of operating systems and kernel programming, knowledge of Windows,
a good understanding of hardware architecture, superb debugging skills, and
excellent communication and planning skills. You will work closely with other
software engineers to design, develop, and debug many functional aspects of our
multimedia accelerator devices. You will also work with hardware engineers for
architecture and design of business specific features. You will follow the
devices all the way from the development process to the customer desktops,
notebooks, workstations, and gaming console products that are used throughout
the world.

MINIMUM REQUIREMENTS:
- BS or higher degree in Computer or Electrical Engineering, Computer Science,
or related degree
- 5+ years of systems software experience.
- Excellent C programming skills
- Hands on experience with Windows device drivers a big plus
- Familiarity with computer system architectures and the hardware/software
interface layer models
- Understanding of system concepts including interrupts, exceptions.
- Interest in low-level operating system knowledge, including memory/resource
management, scheduling and process control, and hardware virtualization
- Should be able to use tools like JTAG, ICE and scopes.
- Experience with complex system-level debugging is invaluable
- Emulation and simulation experience is invaluable.

EOE

[Non-text portions of this message have been removed]

Please send your resume to rkhanna AT NVIDIA dot com

SR OPENGL SOFTWARE ENGINEER - MAC #1044583

NVIDIA is searching for world-class software engineers to join the NVIDIA Mac
graphics driver team and help produce the next revolutionary Apple products
Successful candidates will be driven, cooperative, and have a passion for
graphics and the Mac platform.  They will have strong C programming skills as
well as an extended software design experience, a thorough understanding of
OpenGL and 3D graphics, including the use of the most recent additions to the
OpenGL API, and excellent communication skills. Successful candidates will work
within a team of exceptional and passionate engineers to implement and extend
OpenGL on the latest cutting-edge NVIDIA and Apple OSX platforms. Working in
partnership with Apple, their code will define and shape the future of OpenGL
both for computer platforms as well as next generation consumer electronics
devices.

MINIMUM REQUIREMENTS:
- BS or higher degree in Computer Science, or related degree
- 5 years+ experience using OpenGL
- Thorough knowledge of C/C++ required
- Strong architectural and design skills
- Experience with driver development and kernel side development is invaluable
- Should be familiar with complex multithreading concepts
- Experience with OSX and/or Linux operating systems
- Experience with complex debugging is invaluable

EOE



SENIOR WINDOWS DESKTOP SOFTWARE ENGINEER #902467

NVIDIA is looking for world-class software engineers to help develop industry
leading solutions with our desktop software group. Successful candidates will
need a thorough understanding of Windows internals and expertise writing C++
applications to empower it. Projects will be related to critical customer issues
- this includes reproducing tough issues, working with customers, and providing
debug/development support in remote locations.

MINIMUM REQUIREMENTS:
- BS or higher degree in Computer Science, or related degree.
- 5+ years of Windows application development experience
- Excellent C/C++ programming skills, and knowledge of object oriented
programming and design
- Experience developing applications for Windows, using Win32 API, MFC, ATL,
COM, or GDI
- Strong debugging skills and an understanding of Windows internals
- Good communication and discovery skills, the ability to work both
independently and within a team, and excellent problem solving skills
- Willing to travel to both NYC, NY and London, UK

EOE

EMBEDDED GRAPHICS TEST ENGINEER #967741

Test engineer - member of embedded design team. Will work on embedded graphics
modules bring-up and validation

RESPONSIBILITIES:
- Board bring-up, debug and validation, functional test and generating test
reports.
- Work with design engineers, mechanical engineers, software engineers

MINIMUM REQUIREMENTS:
- BSEE or MSEE. New Graduate acceptable. General knowledge of embedded designs
and PC architecture.
- PowerPC, ARM, and other microprocessors.
- Working knowledge of PCI Express, PCI, AGP, FPGAs, Embedded Graphics, LCD
interfaces, TMDS, LVDS.
- High speed memory interfaces DDR, DDR2
- Experience with high speed design measurement techniques and equipment,
digital oscilloscopes
- Ability to set up, test and record results.
- Familiarity with Windows and Linux environments and tools.

EOE

[Non-text portions of this message have been removed]

Please send the resume to rkhanna@...

Req 993512 - Job Description
SENIOR SOFTWARE ENGINEER #993512

This position is going to impact the bottom line here at NVIDIA as what you will
be owning/designing and implementing is going to be used by every group under
the GPU category. This is an opportunity to have ownership on a project which is
going to be started from scratch.

NVIDIA is searching for a self-motivated and experienced software engineer that
is excited to build database-driven information systems to coordinate and
improve the efficiency of hundreds of engineers. This engineer would be
responsible for the full life cycle of development on complex database-driven
information systems using: ASP.NET 3.5 (in C#), ASP.NET AJAX, Windows
Presentation Foundation, Visual Studio Team Suite (including Team Foundation
Server), SQL Server 2005, and multiple other third party toolsets.

MINIMUM REQUIREMENTS;
- Advanced JavaScript, CSS, DHTML, and XML skills are important.
- A deep understanding of object-oriented design and its implementation in the
.NET CLR are required.
- Distributed application infrastructure setup and configuration are required
(e.g. Windows Server 2003/2008, IIS 6.0/7.0, SQL Server, etc.)
- Specific experience with generics and new .NET 3.0 and 3.5 features like LINQ,
ADO.Net Entity Framework, Windows Communication Foundation, and Windows Workflow
Foundation are desirable.
- Strong communication skills are critical as the engineer will be required to
gather requirements, communicate alternatives, risks, and technical design to a
geographically distributed team.
- A working knowledge of UML, design patterns, software architecture, and n-tier
design are important tools that candidates will need for success.
- Prefer candidates with a BS degree and at least 5 years of experience
developing Web and Windows applications based on the Microsoft platform.

EOE




[Non-text portions of this message have been removed]

Please send resume to rkhanna@...


Embedded QA Engineer

Candidate responsible for architecting, designing, and implementing Q/A
infrastructure and running operations. Will have a leadership role in working
with engineering, marketing, manufacturing, and internal support groups
world-wide to ensure that our software products are produced and tested in a
consistent, effective manner.

Candidate will develop and execute a quality and testing plan, modifying
existing test infrastructure and creating new test suites as needed to implement
the plan. Will design and maintain an automated testing plan for both releases
and engineering check-ins, working with in-house check-in validation team.

Position offers candidate high level responsibility for s/w quality across the
entire embedded software organization. This is a design and programming
position, requiring strong architecture and coding skills, as well as ownership
of department?s quality strategy and methodology. Candidate is expected to
design and create test infrastructure and methodology, and create automation to
satisfy testing, building, and quality requirements, and to write tests.

MINIMUM REQUIREMENTS:
- QA background; test infrastructure and analysis skills
- Good script language (perl, bash) expertise
- Experience with Linux required, other embedded OS experience a plus
- Excellent communicator, both written and verbal
- Graphics and/or multimedia test experience a plus
- Familiarity working with embedded hardware a plus
- C/C++ coding at the application level a plus

[Non-text portions of this message have been removed]

Dear all,

HP Labs India & IISc are organizing a Summer School on Document Image Processing
from 2nd - 12th Jun. 2008.  For more details, visit:
http://ragashri.ee.iisc.ernet.in/SSDIP/

Regards,
abhishek


  /\ |_ |_ ' _ |_  __ |
/--\|_)| ||_\ | ||-_ |<



---------------------------------
Looking for last minute shopping deals?  Find them fast with Yahoo! Search.

[Non-text portions of this message have been removed]

Greetings fellow members,

Please do not hit the Reply button but respond to dinesh.tyagi@... 
for the following opportunity:

Analog Application Engineer, with one of the largest and Most admired
SemiConductor Companies in the world,
Location: Across India

About Us:

Futurestep is a high-performance global provider of innovative, scalable
recruitment and people solutions. Futurestep (www.futurestep.com) is a wholly
owned subsidiary of Korn/Ferry International and has offices in 20 countries.
Korn/Ferry International is a publicly listed company on the NYSE (ticker; KFY)
and is the largest executive search firm in the world with 82 offices in over 40
countries.

About our Client:

Our Client, a US HQ, renowned for developing and commercializing semiconductor
and computer technology is the top supplier of chips for cellular handsets, as
well as the No. 1 producer of digital signal processors (DSP¢s) and analog
semiconductors. Other focus areas include chips for broadband modems, PC
peripherals, digital consumer devices, telecommunication infrastructure, and
Radio Frequency Identification (RFID).

Indian Operations

The first global technology company to start operations in India in 1985, is
taking rapid strides in the Indian semiconductor marketplace.
They work closely with its customers in India in areas such as industrial,
medical electronics, consumer, telecom and automotive, and extends sales and
application support.

With its consistent focus on innovation, they are able to offer a very broad
portfolio of products in India covering the entire semiconductor market. The
company has opened sales offices in multiple locations to reach out to its
customers across the country.

The Positions; Analog Application Engineers,   Location: Across India

Purpose:

Analog Application Engineers (AAE), India use their technical knowledge and
their understanding of the industry to provide leading edge solutions to our
customers. As AAE, you will get the opportunity to work across diverse
industries, stay constantly on the leading edge of technology and gain valuable
product and customer knowledge. You will work on strategic accounts, focus on
long term relationships and develop people skills.


Responsibilities:

Enabling the customer in realizing development of analog designs using Data
converters , Amplifiers , Interface , etc.
By advocating
·         The right topology and technology through creation / evaluation of
schematics and block diagrams
·         PCB layout guidelines
·         EMI / EMC recommendations
Act as an expert resource in analog hardware design
Provide technical expertise to Clients as an Individual Contributor working with
cross-functional teams

Must Haves:

·         BE / ME with 3-8 years of design experience in analog hardware design
·         Strong fundamental knowledge of analog processing
·         Knowledge of Matlab and PSpice
·         Working knowledge of microcontrollers and DSPs will be an added
advantage
  Strong communication skills and Interpersonal Skills


If the above opportunity is of interest to you and your profile matches the
specifics then you may send in your profile and current compensation details, in
strict confidence to Dinesh Tyagi at dinesh.tyagi@...  or call on +91
9891497970.

Warm Regards,

Dinesh Tyagi
Business Development Manager- India
Futurestep
A KORN/FERRY COMPANY
Mobile: + 91 9891497970
www.futurestep.com



      
________________________________________________________________________________\
____
Never miss a thing.  Make Yahoo your home page.
http://www.yahoo.com/r/hs

[Non-text portions of this message have been removed]

Please email me resume at rkhanna AT NVIDIA dot com

Req 899667 - Job Description
SENIOR SYSTEM SOFTWARE ENGINEER #899667

NVIDIA is hiring engineers to work in our core system software engineering
group. The best candidates will have strong C programming skills, a thorough
understanding of operating systems and kernel programming, a good understanding
of hardware architecture, and excellent communication and planning skills. You
will work closely with both hardware engineers and other software engineers to
design, develop, and debug many functional aspects of our multimedia accelerator
devices. You will also be involved with the design and implementation of the
core software infrastructure that is used by the other software teams, with
focus being placed on improving stability, quality, and portability of our GPU
software.

MINIMUM REQUIREMENTS:
- BS or higher degree in Computer or Electrical Engineering, Computer Science,
or related degree
- Excellent C programming skills
- Familiarity with computer system architectures and the hardware/software
interface layer models
- Interest in low-level operating system knowledge, specifically memory/resource
management, scheduling and process control, and hardware virtualization
- Experience with complex system-level debugging is invaluable

EOE
**

[Non-text portions of this message have been removed]

for n=0,

y(0) = x(0); ------> From the given equation.

You assign outside the loop as above. The loop starts from n=1 as what you did.

Regards
  Sridhar. A

----- Original Message ----
From: Babuddin Ahmad <babuddinahmad@...>
To: dspengineering@yahoogroups.com
Sent: Friday, 7 March, 2008 7:59:49 AM
Subject: [DSPEngineering] check if code for filter is correct?

                   Hello,

Please answer the following two questions:

The filter equation is:
y(n) = x(n) – x(n-1) + (1/(1+aT)) y(n-1)
a=10, T=0.001, n=1…N

1. Is the C code below for above filter correct?
for (n=1; n<N; ++n) {
     for (n=1; n<N; ++n) {
         y[n] = x[n] – x[n-1] + (1/(1+a*T))* y[n-1];
     }
     Y[n] = y[n];
}

How to handle the case for n = 0?

2. What the above filter is doing?

Thanks for your help.

Babuddin

____________ _________ _________ _________ _________ _________ _
Never miss a thing.  Make Yahoo your home page.
http://www.yahoo. com/r/hs



<!--

#ygrp-mkp{
border:1px solid #d8d8d8;font-family:Arial;margin:14px 0px;padding:0px 14px;}
#ygrp-mkp hr{
border:1px solid #d8d8d8;}
#ygrp-mkp #hd{
color:#628c2a;font-size:85%;font-weight:bold;line-height:122%;margin:10px 0px;}
#ygrp-mkp #ads{
margin-bottom:10px;}
#ygrp-mkp .ad{
padding:0 0;}
#ygrp-mkp .ad a{
color:#0000ff;text-decoration:none;}
-->

<!--

#ygrp-sponsor #ygrp-lc{
font-family:Arial;}
#ygrp-sponsor #ygrp-lc #hd{
margin:10px 0px;font-weight:bold;font-size:78%;line-height:122%;}
#ygrp-sponsor #ygrp-lc .ad{
margin-bottom:10px;padding:0 0;}
-->

<!--

#ygrp-mlmsg {font-size:13px;font-family:arial, helvetica, clean, sans-serif;}
#ygrp-mlmsg table {font-size:inherit;font:100%;}
#ygrp-mlmsg select, input, textarea {font:99% arial, helvetica, clean,
sans-serif;}
#ygrp-mlmsg pre, code {font:115% monospace;}
#ygrp-mlmsg * {line-height:1.22em;}
#ygrp-text{
font-family:Georgia;
}
#ygrp-text p{
margin:0 0 1em 0;}
#ygrp-tpmsgs{
font-family:Arial;
clear:both;}
#ygrp-vitnav{
padding-top:10px;font-family:Verdana;font-size:77%;margin:0;}
#ygrp-vitnav a{
padding:0 1px;}
#ygrp-actbar{
clear:both;margin:25px 0;white-space:nowrap;color:#666;text-align:right;}
#ygrp-actbar .left{
float:left;white-space:nowrap;}
.bld{font-weight:bold;}
#ygrp-grft{
font-family:Verdana;font-size:77%;padding:15px 0;}
#ygrp-ft{
font-family:verdana;font-size:77%;border-top:1px solid #666;
padding:5px 0;
}
#ygrp-mlmsg #logo{
padding-bottom:10px;}

#ygrp-vital{
background-color:#e0ecee;margin-bottom:20px;padding:2px 0 8px 8px;}
#ygrp-vital #vithd{
font-size:77%;font-family:Verdana;font-weight:bold;color:#333;text-transform:upp\
ercase;}
#ygrp-vital ul{
padding:0;margin:2px 0;}
#ygrp-vital ul li{
list-style-type:none;clear:both;border:1px solid #e0ecee;
}
#ygrp-vital ul li .ct{
font-weight:bold;color:#ff7900;float:right;width:2em;text-align:right;padding-ri\
ght:.5em;}
#ygrp-vital ul li .cat{
font-weight:bold;}
#ygrp-vital a{
text-decoration:none;}

#ygrp-vital a:hover{
text-decoration:underline;}

#ygrp-sponsor #hd{
color:#999;font-size:77%;}
#ygrp-sponsor #ov{
padding:6px 13px;background-color:#e0ecee;margin-bottom:20px;}
#ygrp-sponsor #ov ul{
padding:0 0 0 8px;margin:0;}
#ygrp-sponsor #ov li{
list-style-type:square;padding:6px 0;font-size:77%;}
#ygrp-sponsor #ov li a{
text-decoration:none;font-size:130%;}
#ygrp-sponsor #nc{
background-color:#eee;margin-bottom:20px;padding:0 8px;}
#ygrp-sponsor .ad{
padding:8px 0;}
#ygrp-sponsor .ad #hd1{
font-family:Arial;font-weight:bold;color:#628c2a;font-size:100%;line-height:122%\
;}
#ygrp-sponsor .ad a{
text-decoration:none;}
#ygrp-sponsor .ad a:hover{
text-decoration:underline;}
#ygrp-sponsor .ad p{
margin:0;}
o{font-size:0;}
.MsoNormal{
margin:0 0 0 0;}
#ygrp-text tt{
font-size:120%;}
blockquote{margin:0 0 0 4px;}
.replbq{margin:4;}
-->






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[Non-text portions of this message have been removed]

Hello,

Please answer the following two questions:

The filter equation is:
y(n) = x(n) – x(n-1) + (1/(1+aT)) y(n-1)
a=10, T=0.001, n=1…N

1. Is the C code below for above filter correct?
for (n=1; n<N; ++n) {
     for (n=1; n<N; ++n) {
         y[n] = x[n] – x[n-1] + (1/(1+a*T))*y[n-1];
     }
     Y[n] = y[n];
}

How to handle the case for n = 0?

2. What the above filter is doing?

Thanks for your help.

Babuddin



      
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About Tilera: http://www.tilera.com
SW Engineer: Applications development
Please send resume to gsvrao@...


RESPONSIBILITIES:

- Development and multimedia and wireless application on Tilera
multicore CPUs
- Involve in providing solutions solving problems in key customer accounts
- Taking active role in defining the next gen architecture
- Work with other internal archtecture, HW, SW and FAE teams

MINIMUM REQUIREMENTS:
- Bachelor's degree in Computer Science or Electrical Engineering
- Strong programming skills in C and C++
- Strong written and oral communication skills to interface with other
engineers
- Good problem soliving skills
- Familiar with Linux OS