(Rob babbling away again...)

In the perpetual analysis for, and in striving for the perfect isa,
it seems to me that cisc style calls and returns would be better than
than the risc style of using a link register. But I'm wondering *why*
it hasn't been done.

For instance, a 'call' instruction could be viewed as nothing more
than a specialized store instruction that stores the pc to
the stack. Similarly, a 'ret' just retrieves (loads) the pc from the
stack. Of course the stack pointer has to be adjusted, but that is
*very* simple to do.

It seems to me that using cisc style calls and returns could
eliminate the two instructions from every non-leaf subroutine that
are otherwise required to save and restore the link register. This
should result in a modest performance gain of two per cent across the
non-leaf routines.

Before I go ahead and modify my processor, I'd like to know why this
is a bad idea ?

If implemented, this would mean my processor is no longer strictly a
load / store architecture. Maybe I'll call it a HyRC - HYbrid Risc -
Cisc ("Herc") processor ? Or better yet a CRHy ("Cry") processor.

PS. I'm thinking of code naming my 240Mips EPIC processor
the "Puffin".

Thanks
Rob http://www.birdcomputer.ca/