Hi everyone,

With Tapani's small entry submission, I decided to work on my
entry as well. As I was doing so, I came across what could
be a discrepancy in the rules, so I have updated them a bit.
(See the * in the first column and the note near the end of the
rules)

Details follow:
When you set bit 9 in the UHCI port register, you are
resetting the port. Then to clear the reset, you wait
a minimum of 50ms and clear bit 9 in the port.

However, the discrepancy in the rules comes from the fact
that you could to the following:

mov dx,io_base
add dx,10h
mov ax,(1<<9)
out dx,ax
call delay
and ax,(~(1<<9))
out dx,ax

however, since the reset has taken place, during the delay,
the hardware will set the bits in the port register to their
default states and what not. If you simply write the old value
back, only clearing bit 9 first, you may clear a bit that has
been set due to the reset.

Also, after you clear the reset bit, you must wait a short
time for the reset to finish before you can set the enable
bit. If you simply do:

mov dx,io_base
add dx,10h
mov ax,(1<<9)
out dx,ax
call delay
and ax,(~(1<<9))
out dx,ax
call delay
or ax,(1<<2) ; <- ax may not be correct anymore
out dx,ax

ax won't contain the correct values. Now, on the UHCI, this
may or may not be a problem, depending on how the hardware
was made to handle RO and Reserved bits. However, it isn't
good programming practice to do the above.

So, I have made it a rule that you must read in the value,
change the bit, then write it back as so:

mov dx,io_base
add dx,10h
mov ax,(1<<9)
out dx,ax
call delay
in ax,dx ; <---------
and ax,(~(1<<9))
out dx,ax
call delay
in ax,dx ; <---------
or ax,(1<<2)
out dx,ax

It adds two instructions to your code.

Sorry if this makes any problems with your current entry.

Thanks,
Sniper