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kicad-users

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Group Information

  • Members: 4053
  • Category: Open Source
  • Founded: Aug 31, 2005
  • Language: English
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Activity within 7 days:

23 New Members - 81 New Messages - 1 New Photo - 1 New File

Description

This group is for users of KiCad, the amazing integrated EDA program. Not only does it capture schematics and layout PCBs, it is open source, free and runs on a range of platforms. This group concentrates on actually using KiCad, so post your questions, hints, tips and suggestions for improvements.

Download KiCad from http://www.kicad-pcb.org

The KiCad Wiki can be found at : http://kicad.sourceforge.net/

For details of uploading your libraries, symbols and footprints go to http://www.kicadlib.org

For Spanish users of KiCad, see http://groups.google.com/group/kicad-users-es?hl=es

For KiCad development, see https://launchpad.net/kicad

Please read the KiCad FAQ in the group files section before posting your question.

Please post your bug reports to the group where they will be picked up by the creators of KiCad.

Most Recent Messages

  (View All)
Re: Running KiCad on Windows Vista
Vista and up (Win7, Win8) have UAC which prevents you from modifying files in certain folders including Program Files. So you get bunch of errors (or worse -
Posted - Tue May 21, 2013 9:38 pm
Ivica Kvasina
kvasina
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Running KiCad on Windows Vista
I downloaded and installed KiCad2013.05.16 BZR4016 and started working through a step by step tutorial from David Jahshan 2006 and updated 2011 by Phil
Posted - Tue May 21, 2013 8:59 pm
jeffrussell2
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Re: Artifact on eeschema connecting wires
That usually mkeans that the lines are NOT joined. The square is the line end marker. Zoom right in to check Andy On Tue, 21 May 2013 08:20:10 -0000
Posted - Tue May 21, 2013 6:15 pm
Andy Eskelson
g0poy
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Re: Updates and layer stiching
... Hello, Just a note on that note. Using KiCad build: (2013-mar-19) stable, Pcbnew lets you choose the module name source: from netlist / from separate .cmp
Posted - Tue May 21, 2013 12:22 pm
e_e_lucchesi
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Artifact on eeschema connecting wires
On ee scheema if two wires are joined, sometimes a very faint out line of a square appears around them, they do not throw up a DRC error,does anyone not what
Posted - Tue May 21, 2013 8:20 am
russ95462
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Message History

Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec
2013 370 364 301 253 173
2012 232 327 258 172 161 153 161 204 109 184 418 202
2011 191 224 308 173 145 156 130 246 197 150 365 248
2010 320 191 198 194 219 124 124 160 149 202 226 143
2009 160 219 191 171 192 134 172 206 161 217 125 187
2008 96 159 68 121 78 68 95 146 145 180 115 62
2007 271 175 119 75 112 60 68 75 87 194 171 88
2006 163 130 110 88 66 52 49 37 84 68 135 135
2005 4 59 134 141 111

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