... That’s what I did. I joined the devel group some weeks ago, thinking I had a great idea. I need layer-based clearance an width constraints, because my...
15375
Robert
brownbrummig
May 22, 2013 3:22 pm
If Russ had made his first post a question "how do I do this?" rather than a complaint about the things he thought couldn't be done in kicad but could be fixed...
15376
Robert
brownbrummig
May 22, 2013 3:29 pm
It's always pleasing when someone rolls up their sleeves and contributes to the project as best they can. It's not something I've needed, but area-based...
15377
asp_digital
May 22, 2013 6:04 pm
... I'd go further and argue that you don't need two separate ground planes. (And to address the follow-up about SMPS routing, if you consider the various...
15378
jeffrussell2
May 22, 2013 6:19 pm
Thanks for the information, however, I have been unable to find a KiCak file. Please advise where I can find this file. regards, Jeff...
15379
Rob Gilliom
rgilliom1
May 22, 2013 6:37 pm
I don't know if this will work, but is it possible to place a second pad (a very small smd pad) at the geometric center of your pad? This would give you a pad...
15380
Robert
brownbrummig
May 22, 2013 6:43 pm
When I had this problem I used Agent Ransack to search the entire hard disk for the file. Then I moved it somewhere I could find it without assistance. ...
15381
jeffrussell2
May 22, 2013 7:46 pm
Thanks, I did as you suggested and can now save and view my files in C;\KiCad\tute1 However, now when I get to step 135 of the tutorial "Read Current Netlist"...
15382
Robert
brownbrummig
May 23, 2013 7:00 am
Firstly, did you move all the files from the directory where you found the file you searched on? Secondly, you need to create a netlist in EESchema and read it...
15383
Charles Goyard
charles_goyard
May 23, 2013 8:22 am
Hi, In a quest of finding what "stiching"; is, I find out it's stiTching :). And I also find out that useful tutorial: ...
15384
Eddie Stassen
estassen
May 23, 2013 8:49 am
Yes, it works ok, until automatic loop removal removes all your hard work ......
15385
Charles Goyard
charles_goyard
May 23, 2013 10:15 am
Hi, When does automatic loop removal takes places ?...
15386
Simon Huwyler
simon.huwyler
May 23, 2013 10:52 am
I had just the same problem the other day. Then I just turned off that feature and turned it on again afterwards. Gesendet mit AquaMail für Android ...
15387
Ivica Kvasina
kvasina
May 23, 2013 11:39 am
i think the 'automatic loop removal' is what in PcbNew is called 'auto delete old track'. ________________________________ From: Simon Huwyler...
15388
jeffrussell2
May 23, 2013 2:31 pm
Thanks, I moved a copy of the files over to the working folder and was able to continue through the tutorial. regards, Jeff...
15389
bpc2296
May 23, 2013 8:53 pm
Hi there! Tried to follow Andy's tip here, but it didn't work. I'm using 2013-03-19 BZR 4004 on Windows I'm assuming the tip is for use in pcbnew. I switch to...
15390
Andy Eskelson
g0poy
May 23, 2013 9:10 pm
You don't need to edit the module at all. You switch to polar, position the cursor at the centre of your circle, then hit space. That is I think what you have...
15391
asp_digital
May 24, 2013 4:45 am
... It turns out that I needed to do this. A lot of surface-mount ICs have thermal pads which need to connect to a copper pour on same layer as the part, and...
15392
asp_digital
May 24, 2013 5:21 am
... Oy, replying to myself. I looked at the PCB file in a text editor and saw that the traces and vias I used to stitch the top-layer pour to the ground plane...
15393
Lawrence
lawrence_joy
May 24, 2013 6:21 am
Concerning Files>myGuidelines\Symbols_Guideline_Rev2.odt document to files area from message #15319. Here is some feedback and comments about your guidelines....
15394
Charles Goyard
charles_goyard
May 24, 2013 7:33 am
Hi, ... If I understand your question, then, yes: there is the "do not show filled areas in zones" icon on the left icon toolbar. Cheers, -- Charles...
15395
Robert
brownbrummig
May 24, 2013 8:21 am
Using a copper pour for this is the wrong approach because the copper pour will be covered with solder resist and consequently there will be a gap between the...
15396
Russ Hughes
russ95462
May 24, 2013 8:55 am
Put a a wishlist on the home page, let people vote for the features they want and then put the top ten or whatever on kickstarter, and make it clear anyone...
15397
russ95462
May 24, 2013 12:25 pm
... I look forward to an answer on how to get round this....
15398
Robert
brownbrummig
May 24, 2013 3:18 pm
Although kicad has a bitmap importer I'm not happy with it. A QR bitmap I tried to import yesterday got imported as an uneditable square blob. Some time...
15399
asp_digital
May 24, 2013 5:01 pm
... I will never use cvpcb for any reason, so the first point isn't relevant. And as to the second, recent versions of PCBnew have an netlist import option...
15400
asp_digital
May 24, 2013 5:03 pm
... My footprints include the thermal pad, so unless PCBnew's zone-pour feature is broken, the thermal pad shouldn't have any soldermask on it. But that's a...
15401
asp_digital
May 24, 2013 5:07 pm
... Well, to move forward, I ended up deleting the "netless" traces and vias and re-doing it. One of the posts in this thread pointed out that the trace had to...
15402
Karl Schmidt
karlps
May 24, 2013 5:38 pm
... There has never been a good reason to run cvpcb - it was not required from back at least to 2006 There is a place holder for the tool on ...
15403
Hamish Mead
hamish.mead
May 24, 2013 5:39 pm
Nice one Robert! I'll have a play with it sometime I get a spare moment. Cheers, Hamish...
