Thanks for the tips David I redid the order of things, i.e. create netlist, run cvpcb, resave, and then load netlist in ocbnew The TO92/TO220 issue has gone,...
... last TO ... around it ... of the ... Hi, In PCBnew go to preferences then general options and click on show ratsnest. The ratsnest can be enabled/disabled...
Having trouble with the logic behind labels. Hi, I'm currently having a root sheet which contains some 8 sub sheets (one of the sub sheets also contains two...
Hi, Sometimes, it's necessary to use isolating components to isolate one part of a circuit from another. In my case, I want to isolate the processor...
Hi, I've had a look at your design. I do not understand either the logic. You should have warnings always or never but not sometimes. I think bidirectional or...
Yes, there are different symbols for different grounds. I use analog and digital ground symbols. They are different nets. Remember that copper does not...
Hi, It would be useful if individual nets could be highlighted. This would make it much easier to understand the logic behind hierarchical sheets, sub sheets...
... Well, that makes two of us now... ;-) ... I fully agree. It's one way or the other, but a mixed combination that seems OK at first glance, is at least......
Hi, Well, what I try to mean is that I use global labels, but I trace the wires at the top level. Or, the same thing, I use local labels at the top level to...
... Hi Pedro, As promised, I did some investigation/experiment with my electrical design and verified with the net list, as you suggested. I came to know that...
Can someone explain to in a step-by-step fashion how to place and connect buses, particularly in the context of address and data bus for microcontrollers or...
Well, As I Have told before, I work as your first conclusion. But there are 3 mistakes, in my opinion, in your eschemas: In figures Im91, Img142 and Img220...
... dangling) ... Just to avoid confusion: I've not used global labels, but hierarchical pins. Global labels have text inside the label symbol... ... ...
Hi, Excuse me, I have mixed up global labels with hierarchical labels. Yes, we were talking about hierarchical (inside the subsheet) labels and pin sheets ...
... Not in my case. Text placement is wrong in gerber file, too! But correct in pcbnew. ... I'll look at the library and eventually modify it. Hole in pad is...
Hello, I've been using Kicad for the last year in different projects at full satisfaction. Yesterday I updated from version 2007-11-29 to the last one...
Thanks Pedro, you are right! In the name of God, how could I do that stupid mistake after hundred hours using Kicad? This is a clear sign of ageing problems......
Two questions: 1- In EEschema, the Power_pins On/Off have to be forced at any schema begin: but when I have to re-design a schema, the command Power_pins...
Hello, and Bonjour, Sorry if this should post twice but the first was rejected from Yahoo. Right now I am trying several CAD systems because I need to change...
... Unless you are using Pads PCB for the PCB program, that would not apply to you. It sounds like you will be only using the PCBNew netlist. I design all my...
... It is PADS, the program that is now distributed by Mentor. So it probably applies. But that where I am not sure, whether the problem still exists. -- ...
... I can think of two ways: 1) place a resistor footprint 2) set your via settings to get a nice big pad and a decent size hole. Then route a trace on the top...
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