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Messages 5462 - 5491 of 6241   Oldest  |  < Older  |  Newer >  |  Newest
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5462
Hi, same problem here. I opened a gerber generated with altium and gerbview shows arc on external corner of the board. Waiting for the fix :) Thank you Marco...
teddemarco@...
teddemarco...
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Jul 1, 2009
7:13 am
5463
... Do you mean changes to the module itself, or do you mean changes to the footprint name in EESchema in order to assign a different module? If you mean the...
Robert
brownbrummig
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Jul 1, 2009
7:58 am
5464
... What version are you using? This was fixed in svn, but there hasn't been an official release since then. Best Regards, Brian....
Brian Sidebotham
briansidebotham
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Jul 1, 2009
10:20 am
5465
... Yes, it appears that the "Import .stf file" feature will do exactly what I want. The "back annotation" description confused me because I think of...
mmabshaffer
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Jul 1, 2009
1:04 pm
5466
Gerbview 20090216-rc6, Kicad 20090216-final for windows. What is svn? Thank you Marco...
Marco
borntobeabramo@...
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Jul 1, 2009
9:05 pm
5467
I'm looking for a footprint for the 4017 cmos chip. Apparently the cmos lib dosn't have a mod file. does any onr where i can get one?...
acidblue@...
acidblue...
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Jul 1, 2009
11:43 pm
5468
It's a 16 pin DIL so use that Normal footprint name is DIP16-300 or the EL verson for oval pads. Don't forget that one footprint can be used with many...
Andy Eskelson
g0poy
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Jul 1, 2009
11:56 pm
5469
Aha! thanks, actually in Kicad it's labeled 16Dip300, but thats ok. I got it....
acidblue@...
acidblue...
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Jul 2, 2009
12:13 am
5470
Gerbview 20090216-rc6, Kicad 20090216-final for windows. What is svn? Thank you Marco...
Marco
borntobeabramo@...
Send Email
Jul 2, 2009
12:22 am
5471
My pots get loaded as sm1206 footprint which aren't pots at all. So what should i be looking for on the mod file for potentiometers ?...
acidblue@...
acidblue...
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Jul 2, 2009
2:45 am
5472
Step 1: Print out the PDF file that has all of the footprints placed on one board with the name beside it. Step 2: Refer to document printed in step 1 every...
Greg Dyess
gregory.dyess
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Jul 2, 2009
3:03 am
5473
Thanks for the info, but after looking thru it im so confused, they're diagrams that kinda look like pots but after checking them out in 3D view they're not....
acidblue@...
acidblue...
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Jul 2, 2009
3:42 am
5474
Hallo, it's actual development files repository. If you want to try the most current version (at your own risk :-)), go to http://kicad.1301.cz Milan...
Milan Horák
strangernh
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Jul 2, 2009
5:45 am
5475
As Greg says the pdf is very useful... If you are using "normal" pots there are two option, RV2 & RV2X4 on the first page. If these do not match your pot you...
Andy Eskelson
g0poy
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Jul 2, 2009
9:02 am
5476
I need to convert BRD format to centroid format. Is it possible with Kicad PCB? Is there any additional tool to do this?...
ando.soares
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Jul 2, 2009
12:35 pm
5477
Hi I have a serie of ERC errors telling me "Pin passive connected to Pin unspc" what does it mean, and what could be the action to take... I did'nt forget to...
F6ITU
marcolanie
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Jul 2, 2009
5:17 pm
5478
Thanks Greg, i think the RV2 is what i need. I sooo over looked them....
rocko
acidblue...
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Jul 2, 2009
5:21 pm
5479
when i open Pcbnew, after CVPcb, i noticed some of my led's and resistors aren't connected, no rats nest. Shouldn't every module have a connection ?...
acidblue@...
acidblue...
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Jul 2, 2009
6:35 pm
5480
Every connection you make should have a wire in the rats nest. Have you run an ERC on the circuit? The most common problem is that you forget to add junctions...
Andy Eskelson
g0poy
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Jul 2, 2009
10:35 pm
5481
The DRC works by a set of rules. Unspecified pins ALWAYS generate a warning by default. You have a few options. Ignore the warning a carry on. Do NOT to use...
Andy Eskelson
g0poy
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Jul 2, 2009
10:36 pm
5482
I always do an ERC check, till it gets to 0. Whats a good grid size? I always use the default,which i think is 50ml, should i try something smaller? BTW this...
acidblue@...
acidblue...
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Jul 3, 2009
1:50 am
5483
You probably have diffent names in eeschema and pcbnew. Example: a trandistor with B-C-E and a module with 1-2-3 Alain...
Alain Mouette
alainm3
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Jul 3, 2009
4:33 am
5484
Not sure i know what you mean. I think your saying if i assigned the wrong module to a part in Cvpcb it won't get wired in pcbnew ??...
acidblue@...
acidblue...
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Jul 3, 2009
4:46 am
5485
Thank you, Andy. You solved the problem. I did’nt catch that “unspc” was standing for “unspecified”… not enough sleep, too much alcool… or...
Marc Olanie
marcolanie
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Jul 3, 2009
7:22 am
5486
The good grid size is one that matches the libs... Normally the default is fine. What can happen is that if you create your own parts, and use a different grid...
Andy Eskelson
g0poy
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Jul 3, 2009
10:32 am
5487
... I think it's dangerous to make users ignore warnings or errors. It's very easy to miss a genuine one if you're already expecting some non-zero amount of...
Werner Almesberger
werner@...
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Jul 3, 2009
1:39 pm
5488
Warnings are just that, a warning it's up to the user to heed or ignore. Nothing sweeping about that. Modify the rules, to be done with care as I pointed out,...
Andy Eskelson
g0poy
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Jul 3, 2009
3:59 pm
5489
in eeschema the pin has a name. in pcbnew the pin also has a name. the component and the module are independent and were made by different persons. So it is...
Alain Mouette
alainm3
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Jul 3, 2009
4:37 pm
5490
... What I mean is that it's easy to miss warnings if your system always generates some. You're much less likely to miss a warning if your system normally...
Werner Almesberger
werner@...
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Jul 3, 2009
4:45 pm
5491
ok I think i'm beginning to see. Now i just need to find I tutorial on how to make/change modules....
acidblue@...
acidblue...
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Jul 3, 2009
8:10 pm
Messages 5462 - 5491 of 6241   Oldest  |  < Older  |  Newer >  |  Newest
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