See how the test bench is compiled by doing 'make soft' in the
template design directory. The final command will be:

sparc-elf-gcc -I../../software/leon3 -O2 -g -msoft-float systest.c -L./
lib3tests.a -o systest.exe
sparc-elf-objcopy -O srec systest.exe sram.srec

You can do pretty much the same using your own application:

sparc-elf-gcc -O2 -g -msoft-float myapp.c -o myapp.exe
sparc-elf-objcopy -O srec myapp.exe sram.srec

And make sure you understand how to use the 'volatile' keyword
in C if you intend to do any memory tests or similar ...

Jiri.

sacliv wrote:
> Wow that's good to know. So is there a way to easily simulate my test
> code using the leon3 VHDL code?
>
> --- In leon_sparc@yahoogroups.com, Jiri Gaisler <jiri@...> wrote:
>>
>> You do not want to simulate a mkprom image in VHDL, trust me.
>> Even the smallest image will execute ~ 1,000,000 instructions
>> before entering main() in RAM. This is only ~ 30 ms on real
>> hardware at 50 MHz, but ~ 10 hours in VHDL (on a fast host).
>>
>> You can easily see in TSIM how many instructions you will need:
>>
>> sparc-elf-gcc -msoft-float hello.c -o hello.exe -lsmall
>> sparc-elf-mkprom hello.exe -nocomp -nomsg
>>
>> tsim-leon3 prom.out
>> .
>> .
>> section: .text, addr: 0x0, size 34304 bytes
>> read 103 symbols
>> tsim> bre 0x40000000
>> breakpoint 1 at 0x40000000: .bdata
>> tsim> run
>> breakpoint 1 .bdata
>> tsim> per
>>
>> Cycles : 1399497
>> Instructions : 906783
>> Overall CPI : 1.54
>>
>> CPU performance (50.0 MHz) : 32.40 MOPS (32.40 MIPS, 0.00 MFLOPS)
>> Cache hit rate : 98.7 % (100.0 / 80.0)
>> AHB bandwidth utilisation : 33.7 % ( 0.4 / 33.3)
>> Simulated time : 27.99 ms
>> Processor utilisation : 100.00 %
>> Real-time performance : 11.86 %
>> Simulator performance : 3843.69 KIPS
>> Used time (sys + user) : 0.24 s
>>
>>
>> So even if we created the smallest possible binary using -lsmall
>> and fastest mkprom loading with -nomsg and -nocomp, you will need
>> to execute 906,783 instructions to get to RAM, and then maybe an
>> other 10,000 to get to main(). This is why the test bench in leon3
>> designs does NOT use mkprom, but a simple assembly reset sequence
>> and a pre-loaded RAM image...
>>
>> Jiri.
>>
>>
>> sacliv wrote:
>>> Hey guys, I'm trying to load a test c program i wrote on the leon3 in
>>> the vhdl leon3 code and run it in modelsim to view the waveforms.
>>>
>>> I followed the bcc manual and did mkprom on my executable, and then i
>>> copied the .srec file to the testbench directory, and in the
>>> testbench.vhd, i changed the filename of the prom.srec to test.srec,
>>> which is my srec file.
>>>
>>> The test program is very simple and just prints out hello world, but
>>> in the modelsim simulation of the leon3, i'm watching the pc and
>>> instructions of the leon3 core, but i can't seem to get to my test
>>> program.
>>>
>>> Does anyone know either how long i have to simulate it until before i
>>> get to main() in my test program? Or if i'm doing it wrong, what's the
>>> correct procedure? Thanks!
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>> Yahoo! Groups Links
>>>
>>>
>>>
>>>
>>>
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