hi to all I am doing a project and I have 2 queries 1) Is it possible that I can synthesize leon3 using freely available Xilinx ise webpack. 2) I have...
... Yes, if you target a device that is supported by the WebPack. ... You need to install a link in /opt that points to the install directory of BCC. There is...
Hi, Jiri and all After doing every steps from the PS/2 keyboard chapter of Snapgear manual 1.30.0, the VGA console works fine but the keyboard still has no ...
Hi, From release p29 and onwards you will need the new PS/2 core that has not been released yet. The new PS/2 core will be available in the next release of...
Hello, In Leon2 LD instructions have CPI=1 but ST instructions have a CPI=2. Why does a ST takes two cycles even that the store address and store data are...
The ST instruction will always take 2 cycles, since it can use up to three register values and the register file has only two read ports. One could modify the...
OK, I have uploaded the new PS/2 port (apbps2.vhd) to the group's file area. You should copy it to lib/gaisler/misc and re-run synthesis. The the PS/2 will...
I have been trying to synthesize leon3 design using xilinx ise 8.1 for digilent xup fpga board, but was not successful. Please have a look at this error report...
One correction I mentioned "reasons for these errors" but I meant can any one help why I am getting these errors?? Another query how mush time does it take for...
To understand loadable modules in TSIM, I am using the io.c in the iomod directory to make a io.so module. (I used the switches specified in the Makefile when...
A manual for LEON SnapGear p30 Linux is available at www.gaisler.com, under the Linux download page. Table of contents: 1 INTRODUCTION 1.1 LEON Linux ...
... Does this mean that the ST will stay two cycles during the Pipeline Memory stage: *the first to set the ST address *the second to provide the ST data ...
Hi all I'm trying to implement this design in the XUP board but when I synthesize it and load to the board nothing happens and when I start grmon it doesn't...
Yes, I tried it before starting grmon and also when grmon is searching for Leon. I also tried starting grmon with the option -freq 100. I know it's not problem...
** More information ** If I start grmon using -jtag option it detects 0 MHz frequency and I see "Processor not in debug mode" 4 times. If I start grmon using ...
Hi all, I have been trying to get a custom .bit file using tkconfig. However, I always get the same bit file: the one with the default configuration. Here are...
The command 'make config' selects the default leon2 configuration, which has ethernet enabled. Do NOT use this command if you have defined your own config. To...
Hello all! Im new in Leon area and as much in rterm. Id like to ask a few question regarding: 1. I want to simulate three interfaces: Spw, Debug via Jtag and...
Hi everybody, i just downloaded and tried out snapgear-p30. Looks much better organized, but the best addition is by far the user manual! Problem is, no matter...
Hi Dimitris, Have you set up the boot loader correctly, check SDRAM parameters. This can be verified by running the kernel from RAM instead of flash. When ...
Hi Daniel, thanks for the reply. I tried to run from RAM and it works, or at least it goes further (So, i will follow your advice and doublecheck my SDRAM ...
Note that using different serial console baud rate for boot loader and Linux may screw up console output when switching from boot loader to Linux. The kernel...
Hi Jiri I copied an old ISE project to other directory and replaced all *.vhd *.ucf files in it with the ones I had in the project created by me, and now: - If...
I am having some problems programming my synthesized processor using iMPACT with ISE 6 running on windows using a parallel IV jtag cable. I am using...
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