I already have Xcode installed on my Mac, and can build other projects using GCC, both from the command line and from the Eclipse CDT. Here's what I did: 1)...
Thanks Daniel, That error was a Bug from OGG lib. I had a luck in to find a report from a group that put the Vorbis decoder on FPGA. It was a master thesis of...
hy people actually I am trying to put sparc-linux into the leon3 altera-cyclone 2 design I can get run the boot loader from the sdram, and I have the next...
Hi If you read the manuals you will see that it is pointed out on numerous of places that the grmon flag -u doesn't go with linux 2.6. Try removing -u when...
Hi, Jiri and all Please help me. When trying to compile snapgear-p33a with sparc-linux- 3.4.4-1.0.1 and glibc-from-compiler, I get "undefined reference to ...
Hi, Daniel Thanks a lot. It works fine now. In addition, Maybe the following line miss in file "linux-2.6.21.1/ drivers/ide/ide.c" ... #ifdef CONFIG_ATACTRL { ...
Hi, I'm trying to make ip forwarding to be worked on linux2.6.18.1 in LEON3MP with 2 mac system. I successfully built LEON3MP with 2 mac system in which ping ...
During simulation any project in grlib/projects folder at Cadence Ncsim simulation stops at 0 ns moment of time, diagnostic message in console window is: ...
Problem appears with grlib/leon3mp prject (LEON3 IP). I substitute leon3s.vhd module by VHDL netlist of leon3s.vhd (netlist is leon3s, compiled by Synopsys...
The RCC toolchain (sparc-rtems-3.2.3) 1.0.15 for Windows/MingW can now be installed from Eclipse Software update. Select Help->Software Updates -> Find and...
Hi, I am starting to use linux 2.6 on LEON3 (EP1C2 - Cyclone). I got to install the linux and run a custom application. Now I need to do a download of a file...
Hello, I simulated one C program with TSIM (around 500 kcycles) after that I executed it on my Xilinx board. But I can not do Modelsim simulation of Leon3...
Hello, I did an objdump of the excecutable and compared it to Modelsim console, there is an infinite loop in a routine called by printf... But why this...
I have a few small recommendations to improve both the BCC toolchain and its integration with the Eclipse CDT plugin. I thought I'd share them with the wider...
Hello I synthesized leon3 on xilinx XST using xc2v4000-6-ff1152 but it does not show the utilization of slices/luts. For individual synthesis it shows the no....
hi,Jiri, Thanks a lot, it seems works. I had also changed other setting. Since my FPGA board has no PLLOUT as output, I have to use an IO pin as sdclk, as...
Remove the -O2 switch, or learn how to use the C volatile keyword to avoid C compiler optimizations ... ... Make sure that grmon detected the correct board...
You design has been optimized away. This can happen if you have not connected any output ports, or if the clock is not properly connected. Check your design...
Hello everyone, I am simulating a little program on Leon2, and I have a strange behaviour for the UART. If I manaully "feed" it, like in the following line,...
Hi When i synthesize design Xilinx ISE 7.1i, it gave the following error. We are using grlib-gpl-1.0.15-b2149. WARNING:Xst:753 - "leon3mp.vhd" line 455:...
... Have you simulated your design and verified that you do not have any collisions on bus indexes? For example, having two AHB masters with the same hindex...
Eclipse CDT plugin 1.1.9 is now available from Software updates in Eclipse. Changes: * Pre-build and Post-build are now supported (see Build Steps under C/C++...
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