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Messages 12937 - 12967 of 16505   Oldest  |  < Older  |  Newer >  |  Newest
Messages: Simplify | Expand   (Group by Topic) Author Sort by Date ^
12937
hi it j -3 a jus need a configuiration guide to help me have the right choises (you know they are so many) and i have nort that time speacilalla we are in...
Gatfi Sami
gatfisami
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Mar 1, 2008
1:18 pm
12938
Hi A LEON SnapGear guide is freely available from the download area where you got snapgear and the toolchain from, www.gaisler.com -> Downloads -> Linux. ...
Daniel Hellstrom
hedani3l
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Mar 3, 2008
11:46 am
12939
Hi, Thanks for reply. I saw you configured COL = (9), but shouldn't it be 10, if you were also using the memory stick with board from Xilinx? Regards, Jin ... ...
jin.ouyang
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Mar 3, 2008
2:35 pm
12940
Hallo, I've configured a design with 2 Leon3-Cores (via make xgrlib) after make ise && make ise-prog-fpga I tried to connect to the board with grmon via...
hildebrandt.hsuhh
hildebrandt....
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Mar 3, 2008
4:26 pm
12941
I got the same problem before. That means ur leon3 is not detected. Check your config.vhd and compare it with reference design. Good luck. ... board...
vvzmvv
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Mar 3, 2008
4:28 pm
12942
I have loked my config.vhd: library techmap; use techmap.gencomp.all; package config is -- Technology and synthesis options constant CFG_FABTECH : integer :=...
hildebrandt.hsuhh
hildebrandt....
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Mar 3, 2008
4:39 pm
12943
Did you check that your design fit in the device? Can you post the area report from the ISE mapper? Jiri....
Jiri Gaisler
jiri_gaisler
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Mar 3, 2008
4:48 pm
12944
I remember we disabled uart and enable jtag at that time. then it worked. But actually you can enable both all them. anyway you can give a try. probably it is...

vvzmvv11
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Mar 3, 2008
4:50 pm
12945
About the timing constraints - I use exactly the same as they were defined for template desing mentioned previously. I set the DDR clock to 100MHz (original...
pawel.eichler
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Mar 4, 2008
9:25 am
12946
I'm using a template design from grlib-gpl-1.0.17-b2710/designs/leon3mp. My task is to port Leon3 processor to UMC90 nm technology and I've got several...
kawka85
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Mar 4, 2008
11:17 am
12948
Hi Jan again, I'm working on adding another processing core in the grlib via the AHB Bus. It'll need access to memory to load an OS on it and access to the...
cpbridges_ssc
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Mar 5, 2008
4:08 pm
12949
Hi, I am trying to run Linux 2.0 first on tsim and then on the LEON3 in actual FPGA. The steps 'make xconfig' and 'make dep' were successful. However when I...
Muhammad Zeeshan Zia
sourcewizor84
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Mar 6, 2008
1:45 pm
12950
Hello all, I meet a bug with grlib-gpl-1.0.17-b2710 and Synplify. It occured yesterday after I had to re-setup Libero because of a problem with WaveFormer...
Davy Stéphane
davy_lesia_o...
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Mar 6, 2008
3:09 pm
12951
Hi, You need to use the right compiler. sparc-elf-gcc is for Bare C/C++ and eCos, sparc-rtems-gcc is for RTEMS, sparc-linux-gcc is for Linux 2.6 with GLIBC,...
Daniel Hellstrom
hedani3l
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Mar 6, 2008
4:20 pm
12952
OK, I have some output from GRMON-RCP as an apb_slave to start off with (even though I've added the ahbmst component too) but it's coming up as unknown device...
cpbridges_ssc
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Mar 6, 2008
5:11 pm
12953
Hi Jiri, just for my understanding I have got a question about TSIM's handling of endianess. I assume that there's a little endian host. The AHB emulated...
hwulf@...
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Mar 6, 2008
6:39 pm
12954
I think so . I have the same problem. I think that is because GRMON lib doesn't have your own device information. So it cannot be displayed on the screen. I...
vvzmvv
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Mar 6, 2008
7:17 pm
12955
This synplify bug has been reported to Synplicity and Actel about a month ago. No action from their side so far. Obviously, I can not fix there bugs. You could...
Jiri Gaisler
jiri_gaisler
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Mar 6, 2008
11:16 pm
12956
Thanks a lot. ... RTEMS, ... for ... in ... at ... class ... class ... function ... class ... class ... function ... class ... class ... class ... ...
Muhammad Zeeshan Zia
sourcewizor84
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Mar 6, 2008
11:31 pm
12957
Hello, I want to change the device from the template leon3-avnet-ml401 to the device XC4VFX140. The /c/grlib/boards/avnet-ml401-xc4vlx25/Makefile.inc was as...
Sidney Lima
sidocalima
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Mar 7, 2008
2:50 am
12958
Disable the giga-bit ethernet MAC option in xconfig and try again. You might need to remove the associated timing constraints for the giga-bit signals from the...
Jiri Gaisler
jiri_gaisler
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Mar 7, 2008
10:25 am
12959
Hi, I use the memory module devlivered with the board. Configuration of the DDR controller I use looks as follows: -- DDR controller constant CFG_DDRSP :...
pawel.eichler
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Mar 7, 2008
10:59 am
12960
Hi, I can't get it to work as well. It seems to me now that my synthesis has some problem. The DCM ddrphy/nops.read_dll is not instantiated properly. How's...
jin ouyang
jin.ouyang
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Mar 7, 2008
1:58 pm
12961
I was trying to simulate Leon3 by Modesim. Butwhatever I do... original prom.srem, my own hello.srec etc. I've got these results: ... # apbctrl: slv7: Gaisler...
kawka85
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Mar 7, 2008
8:26 pm
12962
Hello Jiri, I disabled the Gaisler Research Ethernet MAC, but there were 3 errors. They are below: ERROR:Xst:1587 - Line 9: No signal name matches...
Sidney Lima
sidocalima
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Mar 7, 2008
10:38 pm
12963
As I said, remove the timing constraints related to the giga-bit signals in the .ucf and .xcf files. Then do a 'make distclean' and 'make ise' again. The...
Jiri Gaisler
jiri_gaisler
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Mar 8, 2008
11:40 am
12964
Jiri, nothing changes. I commented the lines: NET "phy_rx_clk" TNM_NET = "RXCLK_GRP"; NET "phy_tx_clk" TNM_NET = "TXCLK_GRP"; TIMESPEC "TSTXOUT" = FROM...
Sidney Lima
sidocalima
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Mar 8, 2008
10:18 pm
12965
Have a look at the error message: Annotating constraints using XCF file 'leon3mp.xcf'" ERROR:Xst:1587 - Line 9: No signal name matches phy_tx_data(*) pattern. ...
Jonas Ekergarn
ekergarn
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Mar 8, 2008
11:26 pm
12966
TSIM uses the host's byte ordering to optimize performance. If you emulate memory in an AHB or I/O module, byte and half- word writes must be endian swapped on...
Jiri Gaisler
jiri_gaisler
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Mar 9, 2008
2:36 pm
12967
Hello We are 3 students who are having some problems while trying to add a new output port to some Leon 3's entities. We want to have a new output port on...
sileon3
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Mar 9, 2008
7:58 pm
Messages 12937 - 12967 of 16505   Oldest  |  < Older  |  Newer >  |  Newest
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