Hello, For a starter you can compile your linux application as you do with PC application but you substitute gcc with sparc-linux-gcc and copy the application...
GRMON version 1.1.28 is available from http://www.gaisler.com/cms/index.php?option=com_content&task=view&id=190&Itemid=124 This fixes a bug in the GDB...
Hi, As far as I understood from the GRMON user manual, in order to debug a program running on leon3 that was loaded onto an FPGA through a JTAG interface, a...
Both cables will work with grmon. The benefit of the USB cable is that the download speed is ~ 1 Mbit/s, while the parallel cable is limited to about ~ 0.3...
Hello Jiri and all, When using a DPRAM which uses a RAM64K36 component (in a non grlib part of my design), there is a conflict between the axcelerator package...
I met this problem before. What I did is use the most updated axcelerator lib from ACTEL. but not using Grlib's lib. or may be you can just copy the RAM64K36...
Dual-core do not help you. The time is depends on your hard disk read/write speed, ram and @CPU core speed. Untill now...as i know, no tools support...
Hello everyone: My design has two cores with snooping enable, and I add a counter to record times of coherency conflict. With my self-add counter, I find...
Hello Jiri and all, While writing to a buffer mapped in the APB area (though a RMAP/SpW codec), I "loose" some of the content which was supposed to have been ...
Hi group ! does someone design a bridge between ddr controller from xilinx edk tool chain (i.e. mpmc multiport memory controller : PIM native interface shoud...
Hi Jan, and LEON'ers Thanks for the information. I'm now using ModelSim and GRMON to check my design configuration - but am getting a real strange error in ...
GrmonRCP 0.9.3 is now available from http://www.gaisler.com/cms/index.php?option=com_content&task=view&id=190&Itemid=124 GrmonRCP is a graphical version of...
Hi, in GRMON pdf they said for JTAG debugger either Xilinx Platform Cable USB II or Xilinx Parallel Cable IV, but what about BDI debugger is it supported or...
Hello everyone! I'm trying to compile my own Linux to run on a Leon3 mapped onto a Digilent XUP Virtex2Pro Fpga. I installed the sparc cross compiler and i did...
Hi everybody, I want to know, which initialization processes are performed by grmon? Is there any documentation? How the frequency of the board is detected?...
Hello, Do not specify CROSS_COMPILE and ARCH when running make in snapgear, add /opt/sparc-linux-3.4.4/bin to your PATH variable and use xconfig to configure...
Dear sirs, madams: I want to use the "freeze cache on interrupt" Sparc Leon2(*) feature. Freezing is possible. But, is the defreezing possible ? How ? Does...
Freezing and unfreezing of caches is not implemented in any of the leon2/3 operating systems. If you want to use this feature, you will need to modify the...
When connecting via ethernet, the timer is used to determine the target frequency. This does not always work on windows hosts since the packet delay through...
We tried to work in two modes: First we tried to work in master serial mode. We set JP9 1-2 and 3- 4, and all JP7 to 1-2. We then saw 7 devices on the jtag...
The server is requesting a username/password to download the pro version of 1.1.28. I had a similar problem downloading tsim and grmon-eval but was eventually...
If you want to program the FPGA using boundary scan (JTAG), you must set the programming mode to boundary scan (MODE = "101". See page 9 (left upper corner) on...
... Yes, the pro versions are only available to licensed customers. If you have a license please provide your company details to our support mail and we will...
Hi everybody, We ported LEON3 on a FPGA and installed snapgear and obtained the images of Linux. When we try to load the image and run, we run into problems....
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