You must define a debug target for either TSIM or GRMON. Running a sparc binary on the local x86 host will of course not work. See our GRtools manual for...
I defined the target as TSIM2, giving the path for the tsim-leon3 exe file. In the Debugger tab for the Run and Debug dialogs, I've also given sparc-elf-gdb...
Oh, i forgot to mention, i've kept the field asking for the path to the gdb command file in the debugger tab empty...i don't know what path to give there or if...
Hi, I have a few regisers and a couple of FIFO inside my device located under address 0xCF200000 AHB bus. After I started my program with next code in linux : ...
when you are select the options in the debug tab, did you make sure that you selected the right option in the "external target" field? it should have the TSIM...
Hi Jiri, Hi all, background: we are using mkprom2 to create our leon2 image. There is a requirement to disable interrupt during the startup phase as early as...
This is a problem in the non-FT leon3 without MMU. In this particular configuration, you can only use LDA for uncached access, not LDUBA. The FT versions and...
I'd like to compile a newer version of GCC for the LEON3. I was wondering if someone already did some work on building one perhaps using crosstools? If so, any...
The only thing I can think of is that you compare the values of the DDR2 control registers when running from flash or when running a RAM image. You can also ...
Hi all, I was trying with some simple VHDL-Code to build some sort of own IP with which I want to communicate from within a C-program in the LEON3. For this...
Thanx for your reply. I've set up a TSIM2 target and given the relevant path for the tsim-leon3 exe file. When I run the program, I get "exec error: Launching...
You should run your system in a VHDL simulator (modelsim) when you try to design new hardware. If you do so, you can easily see whats going wrong. And also I...
Hi everyone, From the pipeline, I see that ld/st instructions are 2/3 cycles respectively. But if longer access time is required by the MMU to return data, how...
Hi everyone I am configuring my LEON3 system in multi processor configuration. From the "make xconfig" dialgs, in the cache system section of the processor...
Thank you Jiri for the response. In that case if the liram and ldram are local to the processor, how are their AHB address determined assuming that all...
in that case if i write a program and "link" it to these 2 addresses, will it be put in all the processors' local ram or will just be transfered to the...
I apologies for being persistant but what if processor 1 has ldram @ 0x8e000000 with 0x1000 locations liram @ 0x8f000000 with 0x1000 locations and processor 2...
If processor 2 has local RAM enabled at the same addresses, it would access its own RAM. If it has no local RAM configured, then the access would be sent to...
Here is the pow.summary from Power Play (Quartus) *PowerPlay Power Analyzer Status : Successful - Tue Aug 05 01:16:31 2008 Quartus II Version : 7.0 Build 33...
Hi, I got a problem when i compile the Makefile of the custom APP in snapgear-2.6-p36c with my C++ application(testc1.cpp), it can go through the compilation....
Hello, Ihave an application which crashes, the history is: using GRMON I got this trap: 0x4000_xxxx call 0x40001384 0x4000_xxxx nop 0x4000_1384 save %sp,...
this is an FPU_disabled trap. The program is trying to store a value in an FPU register f8, but the FPU is not enable, or non-existent - causing the trap.If...
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