Hi, I am a student and new to leon processor. I have a problem during the compilation of files S. I am explained, I use Cygwin with LECC 1.1.5.3. when I...
I have noticed mention of fpu.c used for testing Meiko CPU but cannot find on web. What does this software do ? If can be distributed, might someone please...
I am using leon2-1.0.21-xst. I have no problem simulating LEON II + target pci using NCSim. But when I use LEON II + OpenCore PCI,there is a problem. I...
I have tried to build code by trying some configurations. I did with linux-2.0.x with uClibc. So far the compilation would stop with some mysterious error. ...
fpu.c does some rudimentary testing of the FPU interface. It is provided in the tsource directory. Note that it only does some very basic intructions, it is...
Hi, In my desing I need to send data to another system. I'm trying to do so with the io system. I have done a design with it and I see a strange behavior in...
Note that you have to enable I/O access in memory config reg 1 before you can read/write the I/O area. Jiri. ... -- ... Gaisler Research, Första Långgatan 19...
Sorry, I instantly left an file out by mistake, sorry for all this. It is going good now. But, Does the testbench (tb_full) includes vectors to test the ...
Hi all, when simulated the linux images generated using the evaluation version of grmon i found that my image-2.0.x.dsu has a different value of Leon clock...
HI, is there any convertor or any software present that will convert the netlist file back into vhdl or verilog file.... if any body know abt it then inform me...
You can start with the famous paranoia program (also provided with leccs in the src/examples/samples directory. Other IEEE-754 validation software on the web...
... No, leon does not provide any PCI test bench. Jiri. -- ... Gaisler Research, Första Långgatan 19 S-413 27 Göteborg +46-317758650 fax: +46-31421407...
Take a look at GRFPU FAQ "How was IEEE-754 compliance validated?". http://www.gaisler.com/products/grfpu/fpu_faq.html. ... --...
edvin@...
Aug 3, 2004 5:34 pm
5396
I have problems in configuring the rom waitstates. I get a conflict in the write waitstate section in the mcfg1 record when I change the boot.S code, something...
hello, I ve compiled all the leon files and test benches. When i am simulating the tb leon , its giving error messages as follows.. Error: (vsim-7) Failed to...
... the ... You can generate a Verilog netlist from a Xilinx ngd file with ngd2ver or to vhdl with ngd2vhdl. There is no way to get it from a bit file....
Hello, I wonder if anyone has succeeded in writing a linux dirver for the CAN IP Hurricane, which can be combined with LEON. I'm working on this but had no...
For those attempting to employ the Leon in an ASIC technology, rather than FPGA, the absence of resets on most registers is a tremendous nuisance for gate...
You don't need to specify the number of banks. In memory config register 1, you should set the memory size (in kbytes) of each ram bank. The chip-selects ...
dear jiri, thanks a lot..bye.. Jiri Gaisler <jiri@...> wrote: You must start the simulation in the top-level directory, not the 'leon' sub-directory. ...
Hi, Thanks for the suggestive mail about ASIC implementation of LEON, we are planning to implement it using cadence tools. I really appricate your mail. ...
hi, I ve compiled and simulated tbleon. When I run it 4000, it gives fatal error messages as follows, LEON-2 generic testbench (leon2-1.0.14) # Bug reports to...
Having problems with message search?
Fill out this form to ensure your group is one of the first to be migrated to the new message search system.
