Hi, Is it possible to disable the cache (I+D) with grmon? I've tried to set the cache config register (0x80000014) manually with 'wmem', but whenever I 'run' a...
Hello, 'run' command automatically enables the caches. Put a breakpoint on a second instruction of your program and type 'run'. When breakpoint is hit disable...
Edvin Catovic
edvin@...
Dec 2, 2004 1:14 pm
5894
What value is seen on address(27:0) from the LEON during reset? Is it possible to take control of data and address during reset (we want to transfer data from...
The value on the address bus during reset is arbitrary, and not used for any purpose. The memory bus of leon is not multi-master, and cannot be used by an...
Hello all, I have a problem while compiling Leon2-1.0.24-xst for Axcellerator devices. I configured the processor for Actel-axcel synthesis. I tried with and...
Stéphane Davy
stephane.davy@...
Dec 2, 2004 3:18 pm
5897
This is a knwo problem and has been fixed in the upcoming 1.0.25-xst release. A temporary fix is to set the cache line size to 16 byte/line with at least 2...
Hello ! I've tried to use the Meiko FPU on the Leon3, and I found that some files are missing in version 0.13 of Leon3 that were present on version 0.12. In...
The meiko fpu was never included in grlib, only the interface. We have removed the interface for now, due to a re-organisation of the libraries in 0.13. I will...
Jiri, I am a bit puzzle by the synthesis time with Synplify, because its mapping never stops. Then, I synthesized proc.vhd submodules separately. I noticed...
Stephane Davy
stephane.davy@...
Dec 3, 2004 5:39 pm
5901
The GRLIB IP library version beta-0.14 is now available from: http://www.gaisler.com/products/grlib/grlib.html There are many improvements and fixed compared...
You have selected inferred ram memories, which will be implemented as flip-flops by synplify for the AX fpgas. That is why you see so long run times. Select...
Snapgear-p8 with leon3 support is now available from: http://www.gaisler.com/products/linux_down.html Currently only uClinux is supported for leon3, pending ...
Version 1.0.6 of the RTEMS LEON/ERC32 cross-compiler system (RCC) is now available for download from: http://www.gaisler.com/products/leccs/leccs_down.html ...
HI I am a beginner in using core development. I have lately bought a Spartan-3 startes kit which has the following features Xilinx Spartan-3 200,000 gate...
... I would say: NO smalles S3 for LEON (LEON3) is XC3S400 a small system occupies over 70% of S3-400 so my bet is that its not possible to have the LEON fit ...
Dear User Group I am posting the following question for another user: I encountered some problems in eclipse platform and I think you can help me.I installed...
The eclipse C/C++ gui will not work for leccs or RCC/BCC on windows platforms. This is because eclipse will try to run the compilers in windows, rather than in...
... there isnt much special needed for s3, and in GRLIB 0.14 there is also an an /boards/memec-s3-1500 that contains the constraints for memec s3-1500 board...
Hi, I am evaluating the potential tools available to do software validation within a Leon2 and highly critical software. My main requirement is that the...
Hello, I would like to know the performances of the implementation of the Leon 2 into an Actel ProAsicPlus FPGA. I have seen that no Tech files are given for...
If you want to access the instruction trace buffer without disturbing the AHB traffic, you could attach the dsu3 and DCL to a separate AHB bus. It would...
Hi, I've used Leon 2 in a ProASIC 750 from Actel. The area was about 80% of the FPGA and the performance somewhere between 5 and 10 MHz. /Anna ... expect for...
I would like to use ghdl for simulating leon. I have built ghdl on cygwin and it works okay on many examples. 1. Does someone has used ghdl with leon. If yes I...
The problems were fixed by: 1. The compile.bat under leon is missing leon/tech_fs90.vhd. I added it in the line ghdl -a --ieee=synopsys leon/tech_generic.vhd...