Andrew Hall (UK) modified the sdram controller for 16-bit
data a few years ago, you can download his patches from:

http://www.ecs.soton.ac.uk/~ajh300/3rdYear/

I have not verified that it works, but it is worth a try.

Jiri.

cikahn wrote:
>
> I'm porting my spartan-3 B/D with leon3.
> But my board has single 16-bit (8MB) SDRAM chip only.
> I think LEON SDRAM Controller support 32/64-bit Data Bus only.
> May I get any advice for 16-bit Data Bus case ?
>
> Regards,
>
>
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>
> .
>

It works :-)
Thanks.
Peer And Marco

-----Ursprüngliche Nachricht-----
Von: Jiri Gaisler [mailto:jiri@...]
Gesendet: Donnerstag, 6. Januar 2005 12:19
An: leon_sparc@yahoogroups.com
Betreff: Re: [leon_sparc] Assembler programming


Use gcc to assemble and link:

sparc-elf-gcc -N -Ttext=0x40000 -nostartfiles file.S -o mini.bin

Note that assembly files should have the .S extension.

Jiri.

peermarco wrote:
>
> Hello,
>
> we want to assemble a little example programm like
>
>  .text
>  _start: .global _start
>        .global main
>  b main
>  main:
>  sethi  %hi(0x40001000), %l4
>  jmp  %l4
>  nop
>  .end
>
> then we made following to assemble:
>
> $ sparc-elf-as mini.txt
>
> grmon[sim]> load a.out
> section: .text at 0x0, size 16 bytes
> total size: 16 bytes (in <1 sec)
> read 2 symbols
> entry point: 0x00000000
>
> then linking:
>
> $ sparc-elf-ld -s -e 0x10074 -o mini.bin a.out
>
> grmon[sim]> load mini.bin
> section: .text at 0x10074, size 16 bytes
> total size: 16 bytes (in <1 sec)
> entry point: 0x00010074
>
> but wenn we link like this:
>
> $ sparc-elf-ld -s -e 0x40000 -o mini.bin a.out
>
> grmon[sim]> load mini.bin
> section: .text at 0x10074, size 16 bytes
> total size: 16 bytes (in <1 sec)
> entry point: 0x00040000
>
> we want and entrypoint .text at 0x40000
> Know someone how to do?
>
> we dont found something about it in the GNU-ASSEMBLER or GNU-Linker
> manual.
>
> Grettings
> Peer Royla and Marco Siebert
>
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>
> .
>

--
------------------------------------------------------------------------
--
Gaisler Research, 1:a Långgatan 19, 413 27 Goteborg, Sweden,
+46-317758650
fax: +46-31421407 email: info@..., home page: www.gaisler.com
------------------------------------------------------------------------
--




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*         To visit your group on the web, go to:
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<http://docs.yahoo.com/info/terms/>  Service.


[Non-text portions of this message have been removed]

The best board for < $500 seems to be a 3s1500 board from Nu Horizons ($399)

http://www.nuhorizons.com/sp3/

It has 4 Mbyte flash, 16 Mbyte sdram, 2x RS232, CAN, ADC, DAC, audio codec,
PS2 interface, 2x ethernet PHY + MAC (LAN91C111) and an LCD display.
LEON should work on this board, but I have not tested it. There is also
a version with a 3s2000 device ($449) but  be aware of that the free Xilinx
Webpack does not support the 3s2000 device.

A similar 3s1500 board is also available from Avnet ($499):

http://www.em.avnet.com/evk/home/0,1719,RID%253D0%2526CID%253D7816%2526CCD%253DU\
SA%2526SID%253D4746%2526DID%253DDF2%2526SRT%253D1%2526LID%253D0%2526PVW%253D%252\
6BID%253DDF2%2526CTP%253DEVK,00.html

This board has only 1 Mbyte SRAM, but does have PCI and video interfaces.
Works well with GRLIB/LEON3, but LEON2 will need some minor tweaks.


An good list of FPGA board can be found at:

http://www.fpga-faq.com/FPGA_Boards.shtml

Regards, Jiri.

Giacomo Bernardi wrote:
> Thanks jiri
>
> Can you suggest me a board ( or a list of that ) more suitable for
> implementing leon that is not expansive for me ( i'm a beginner
> and i' have just finished university so i' don't work yet ).?
>
> I' d like to implement leon-ft and for the future to have the
> possibility on that board to add a floating point unit.
>
> Tha XSA board costs 200$, i need something not much different from this.
>
> Thanks in advance and good work.
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>
> .
>

--
--------------------------------------------------------------------------
Gaisler Research, 1:a Långgatan 19, 413 27 Goteborg, Sweden, +46-317758650
fax: +46-31421407 email: info@..., home page: www.gaisler.com
--------------------------------------------------------------------------

Hello,

for a pressentation we need the whitepaper or other discriptions
of the SEU-Protection from the Leon.
Knows somebody a Source for this?

Peer and Marco

Hi all,
i'm interested in building a co-processor module for the leon2 cpu. I
intend to use the generic co-processor interface. Could anyone please
give me some tips as to where I should look for interface specifics(e.
g. code, docs etc). Where should I attach my module? maybe in the
fp1eu module?

thank you in advance

alex

You can download a DSN2002 conference paper describing the FT
functionality and test results from:

http://www.gaisler.com/doc/dsn2002-3.pdf

Jiri.



peermarco wrote:
>
> Hello,
>
> for a pressentation we need the whitepaper or other discriptions
> of the SEU-Protection from the Leon.
> Knows somebody a Source for this?
>
> Peer and Marco
>
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>
> .
>

--
--------------------------------------------------------------------------
Gaisler Research, 1:a Långgatan 19, 413 27 Goteborg, Sweden, +46-317758650
fax: +46-31421407 email: info@..., home page: www.gaisler.com
--------------------------------------------------------------------------

Hi all,

the post translate simulation-problem solved itself.
Altera ist offering a new ServicePack (SP ver. 2 fpr Quartus 4.1)
After installing that SP the netlist-simulation works perfect. It
seems that the problem was a result of preliminary timing models for
the StratixII-FPGA. This models has been updated by the new ServicePack.

Thx for the help, anyway
Markus Danninger

--- In leon_sparc@yahoogroups.com, "cctv_lsj" <cctv_lsj@h...> wrote:
>
> Hi!
>    The registers in iu.vhd is the most important, they determine the
> initial state of LEON.
> Some registers must be taken care: such as the annul bit in each
> pipeline stage, and the s/ps bit in sregs. They MUST be set the
> proper value Else the initial state may enter unexpected TRAP.
>
>  You can have a try,good luck!
>
> --- In leon_sparc@yahoogroups.com, "markus_danninger"
> <markusdanninger@g...> wrote:
> >
> > Hi,
> >
> > @cctv_lsj:
> > How did you add the extra reset pins? Have I to modify the
> > tech_generic or tech_map or both?
> >
> >
> >
> >
> > --- In leon_sparc@yahoogroups.com, "LiuJun" <liujun@u...> wrote:
> > > DFT is short for design for test.
> > >
> > > ¡¡¡¡
> > >
> > > ======== 2005-01-04 08:01:00 ÄúÔÚÀ´ÐÅÖÐдµÀ£º ========
> > >
> > >
> > > Hi,
> > >
> > > thx for this hint.I'll try this.
> > > In fact the later target is the implementation in ASIC.
> > > But what does DFT mean?
> > >
> > >
> > > --- In leon_sparc@yahoogroups.com, "cctv_lsj" <cctv_lsj@h...>
> wrote:
> > > >
> > > > I don't know if there are better advices from Jiri,but I
> solved
> > > > this Post-Layout Simulation problem by myself.
> > > >
> > > > I added Reset pins for each register.(Especially registers in
> > IU.vhd)
> > > > This will facilitate DFT in the future(if you want to
> implement
> > LEON
> > > > with ASIC) too.
> > > >
> > > > --- In leon_sparc@yahoogroups.com, "markus_danninger"
> > > > <markusdanninger@g...> wrote:
> > > > >
> > > > > Hello all,
> > > > >
> > > > > I try to port the LEONII onto an ALTERA StratixII-FPGA.
> > > > > For simulations i use MODELSIM 5.7e.
> > > > > ALTERA-development-tool is QuartusII 4.1.
> > > > > LEON-targettech is generic.
> > > > >
> > > > > I managed to synthesize the model with QuartusII 4.1.
> > Everything is
> > > > > working fine.
> > > > > After synthesis i generate a (post place and route) netlist
> > with a
> > > > > SDF-file.
> > > > >
> > > > > I go back to modelsim to simulate the netlist. After some
> > trouble
> > > > with
> > > > > the setup and the Altera-Simulation-primitives i could start
> the
> > > > > tb_func32-simulation. It starts and seems to work fine. The
> > > > standard
> > > > > testbench-output is printed. After some time the
> registerfile-
> > test
> > > > > begins, too.
> > > > > But it never ends...
> > > > > That means if i look at the waveforms they will become "X"es
> at
> > > > about
> > > > > 56us. The first "X" appears in the "addresses"-signal
> (toplevel
> > of
> > > > the
> > > > > testbench). More "X"es will follow until everything is red.
> > > > > Very important is the fact that the testbench will print no
> > > > > error-message or something like that; it still seems to work
> > fine -
> > > > > even after a week :).
> > > > >
> > > > > Things i've tried:
> > > > > - Reduce TB-Clk to 10, even to 1 MHz.
> > > > > - Other Testbench: tb_mem. Same problem. After some time
> > everything
> > > > > becomes red.
> > > > >
> > > > > Does anyone got an idea??
> > > > >
> > > > > Thx for replies.
> > > > >
> > > > > Regards and a happy new year,
> > > > > Markus Danninger
> > >
> > >
> > >
> > >
> > > Yahoo! Groups Sponsor
> > > ADVERTISEMENT
> > >
> > >
> > >
> > >
> > >
> > >
> > > Yahoo! Groups Links
> > >
> > > To visit your group on the web, go to:
> > > http://groups.yahoo.com/group/leon_sparc/
> > >
> > > To unsubscribe from this group, send an email to:
> > > leon_sparc-unsubscribe@yahoogroups.com
> > >
> > > Your use of Yahoo! Groups is subject to the Yahoo! Terms of
> > Service.
> > >
> > >
> > >
> > > = = = = = = = = = = = = = = = = = = = = = =
> > > ¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡ÖÂ
> > > Àñ£¡
> > >
> > > ¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡LiuJun
> > > ¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡liujun@u...
> > > ¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡2005-01-04
> > >
> > >
> > > [Non-text portions of this message have been removed]

Dear everyone,

I have some problems when I compile the programs written in assembly language
using sparc-rtems-as.The program is as follows:
                                          .data
                                  a:      .word
                                  b:      .word
                                  c:      .word
                                  d:      .word

                                          .text
                                  start:  set     a, %r1
                                          ld      [%r1], %r2       ! $a$ --> %r2
                                          set     b, %r1
                                          ld      [%r1], %r3       ! $b$ --> %r3
                                          set     c, %r1
                                          ld      [%r1], %r4       ! $c$ --> %r4
                                          set     d, %r1
                                          ld      [%r1], %r5       ! $d$ --> %r5

                                          add     %r2, %r3, %r2    ! $a+b$ -->
%r2
                                          sub     %r4, %r5, %r3    ! $c-d$ -->
%r3
                                          sub     %r2, %r3, %r2    !
$(a+b)-(c-d)$ --> %r2
                                          set     a, %r1
                                          st      %r2, [%r1]       !
$(a+b)-(c-d)$ --> a

                                  end:    ta      0x0
How can I store the result a=(a+b)-(c-d) to the address for example 0x40009ff0?
When I used "stb %g1,[0x40009ff0]",there was always something wrong.

And the default entrypoint is .text at 0x0,If I want an entrypoint .text at
0x40000000,How should I do?


Best regards

Dan Yu













---------------------------------
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[Non-text portions of this message have been removed]

You can put the text section to 0x40000000 either via an linker script
or via a option in the ld settings.
Look at the assembler code and the Makefile in the tsource directory.

--- In leon_sparc@yahoogroups.com, YU yu <hsifnoom@y...> wrote:
> Dear everyone,
>
> I have some problems when I compile the programs written in assembly
language using sparc-rtems-as.The program is as follows:
>                                          .data
>                                  a:      .word
>                                  b:      .word
>                                  c:      .word
>                                  d:      .word
>
>                                          .text
>                                  start:  set     a, %r1
>                                          ld      [%r1], %r2       !
$a$ --> %r2
>                                          set     b, %r1
>                                          ld      [%r1], %r3       !
$b$ --> %r3
>                                          set     c, %r1
>                                          ld      [%r1], %r4       !
$c$ --> %r4
>                                          set     d, %r1
>                                          ld      [%r1], %r5       !
$d$ --> %r5
>
>                                          add     %r2, %r3, %r2    !
$a+b$ --> %r2
>                                          sub     %r4, %r5, %r3    !
$c-d$ --> %r3
>                                          sub     %r2, %r3, %r2    !
$(a+b)-(c-d)$ --> %r2
>                                          set     a, %r1
>                                          st      %r2, [%r1]       !
$(a+b)-(c-d)$ --> a
>
>                                  end:    ta      0x0
> How can I store the result a=(a+b)-(c-d) to the address for example
0x40009ff0? When I used "stb %g1,[0x40009ff0]",there was always
something wrong.
>
> And the default entrypoint is .text at 0x0,If I want an entrypoint
.text at 0x40000000,How should I do?
>
>
> Best regards
>
> Dan Yu
>
>
>
>
>
>
>
>
>
>
>
>
>
> ---------------------------------
> Do You Yahoo!?
> 150ÍòÇúMP3·è¿ñËÑ£¬´øÄú´³ÈëÒôÀÖµîÌÃ
> ÃÀÅ®Ã÷ÐÇÓ¦Óо¡ÓУ¬ËѱéÃÀͼ¡¢ÑÞͼºÍ¿áͼ
> 1G¾ÍÊÇ1000Õ×£¬ÑÅ»¢µçÓÊ×ÔÖúÀ©ÈÝ£¡
>
> [Non-text portions of this message have been removed]

Hello,

I am using Actel Libero 6.0 tools to simulate the Leon. But I have
some problems to simulate the Leon (pre synthesis simulation). I have
seen that some files are not correctly compiled and I think it is due
to the files organisation of libero (package, vhdl, sitimulus ...)

Is the Leon 2 compatible with libero 6.0? How can I simulate the Leon
2 with libero?

Thanks

Bumkele

Hi Jiri,

what are the parameters for configure and make to compile RTEMS for
the LEON1?
I would like to get the same results you got except for one driver
module.

Best regards,

Walter

There is a Makefile in the src directory of RCC which shows
how we configure and build RTEMS.

Jiri.

Walter wrote:
>
> Hi Jiri,
>
> what are the parameters for configure and make to compile RTEMS for
> the LEON1?
> I would like to get the same results you got except for one driver
> module.
>
> Best regards,
>
> Walter
>
>
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>
> .
>

--
--------------------------------------------------------------------------
Gaisler Research, 1:a Långgatan 19, 413 27 Goteborg, Sweden, +46-317758650
fax: +46-31421407 email: info@..., home page: www.gaisler.com
--------------------------------------------------------------------------

Dear,everyone,

I need to download a bootable program to the leon board,if I download the wrong
program,how can I erase it?I am using the leon board "GR-PCI-XC2V".

The other question,I want to compile the programs written in assembly
languague,then I use the "sparc-rtems-as",but the program is start at 0x0,how
should I assign it to start at another address for example 0x40010000?

And when I compiled ".text

  sethi  %hi(0x55555400), %o1
  or     %o1, 0x155,    %o1
  sethi  %hi(0x55555400), %o2
  or     %o1, 0x155,    %o2
"using sparc-rtems-as,and then downloaded it to the leon board using GRMON.But
when I used the command "register",the contants in register o1 and o2 are not
0x55555555.What is the problem?



Best regards


Dan Yu










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[Non-text portions of this message have been removed]

Giacomo Bernardi wrote:
> I'm planning to buy XSA-3S1000 for synthesizing leon2-FT and do some
> experience. Are there any contraddiction?

The XSA-1000 board has only 16-bit wide sdram (no sram), which means
that leon will not be able to use any external memory. The board also
has no serial port, so console output or DSU connection will be not
possible. Thus, the board is not very usefull for leon development...

> If not, is there anyone that knows what area occupation have leon in that
> FPGA?

~50% without the FPU, 90% with the FPU.

> And wich clock frequency is obtainable?

40 - 60 MHz, depending on configuration.

> For implementing leon is better a Spartan FPGA, a Virtex2  or is it
> indifferent ( beetween the Xilinx architectures ) ?

Doesn't matter.

Jiri.

A master thesis comparing the LEON2, Microblaze and Openrisc-1200
processors has been carried out by two students from the Chalmers
University in Sweden. The final report is now available online at:

http://www.gaisler.com/doc/Evaluation_of_synthesizable_CPU_cores.pdf

Jiri.

--
--------------------------------------------------------------------------
Gaisler Research, 1:a Långgatan 19, 413 27 Goteborg, Sweden, +46-317758650
fax: +46-31421407 email: info@..., home page: www.gaisler.com
--------------------------------------------------------------------------

leon2-1.0.26-xst is now available for download from:

http://www.gaisler.com/bin/leon2-1.0.26-xst.tar.gz

Changes since leon2-1.0.25-xst:

   * News

      - Support for byte/half-word access in instruction scratch pad ram
        (cachemem.vhd, icache.vhd, dcache.vhd)

   * Minor fixes

      - Added reset of r.twowner (mmu.vhd) to ease netlist simulation (mmu.vhd)

   * Bug fixes

      - MMU registers could be corrupted when cache rams were accessed
        through the DSU in debug mode. (mmu_dcache.vhd)

      - AHB HMASTERLOCK was driven one clock too late (ahbarb.vhd)



Jiri.

--
--------------------------------------------------------------------------
Gaisler Research, 1:a Långgatan 19, 413 27 Goteborg, Sweden, +46-317758650
fax: +46-31421407 email: info@..., home page: www.gaisler.com
--------------------------------------------------------------------------

Version 1.0.8 of the bare-C cross-compiler for leon2/3 is now
available for both linux and cygwin from:

http://www.gaisler.com/products/leccs/leccs_down.html

The new version has a working C++ library, and is now
capable to compile eCos-2.0. It also includes support
for the leon3/grlib plug&play configuration scheme, and
can automatically detect and configure leon3 uarts and
timers.

Jiri.

--
--------------------------------------------------------------------------
Gaisler Research, 1:a Långgatan 19, 413 27 Goteborg, Sweden, +46-317758650
fax: +46-31421407 email: info@..., home page: www.gaisler.com
--------------------------------------------------------------------------

A very interesting report.

But I did not find any comparison regarding code density of three
processors.

Do you have such information?
Because after using several embedded processor, I have feeling that code
density
of Leon processor is lower than, for instance arm.

--
eko

Jiri Gaisler wrote:

>A master thesis comparing the LEON2, Microblaze and Openrisc-1200
>processors has been carried out by two students from the Chalmers
>University in Sweden. The final report is now available online at:
>
>http://www.gaisler.com/doc/Evaluation_of_synthesizable_CPU_cores.pdf
>
>Jiri.
>
>
>

The code density has not been meassured. The problem is that
the code size depends a lot on the used compiler and
kernel/C-library. To get a comparable value, the same
compiler version and kernel must be used. This was not
possible in the performed study.

Matt Bosworth meassured the code size of LEON (SPARC),
ARM and x86 in this report:

http://f1.grp.yahoofs.com/v1/gCrmQUWeyObMteP54YEoPL_uZfP9qcQWG-er6-MFQcjAr_u-8-W\
DHU0M6vu_cazk-vhgyQfEr0gupzows71L/sparcVarm.pdf


It shows that the code density of SPARC and ARM is comparable,
unless the ARM 16-bit mode (THUMB) sub-set is used. However,
using THUMB also impacts the performance, which should be taken
into account.

Jiri.

Eko Fajar N. wrote:
> A very interesting report.
>
> But I did not find any comparison regarding code density of three
> processors.
>
> Do you have such information?
> Because after using several embedded processor, I have feeling that code
> density
> of Leon processor is lower than, for instance arm.
>
> --
> eko
>
> Jiri Gaisler wrote:
>
>
>>A master thesis comparing the LEON2, Microblaze and Openrisc-1200
>>processors has been carried out by two students from the Chalmers
>>University in Sweden. The final report is now available online at:
>>
>>http://www.gaisler.com/doc/Evaluation_of_synthesizable_CPU_cores.pdf
>>
>>Jiri.
>>
>>
>>
>
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>
> .
>

--
-------------------------------------------------------------------------
Gaisler Research, Första Långgatan 19 S-413 27 Göteborg +46-317758650
fax: +46-31421407 email: info@..., home page: www.gaisler.com
-------------------------------------------------------------------------

Hi Jiri,

the RCC does not include the rtems sources to rebuild rtems.

What do I have to do?






--- In leon_sparc@yahoogroups.com, Jiri Gaisler <jiri@g...> wrote:
>
> There is a Makefile in the src directory of RCC which shows
> how we configure and build RTEMS.
>
> Jiri.
>
> Walter wrote:
> >
> > Hi Jiri,
> >
> > what are the parameters for configure and make to compile RTEMS
for
> > the LEON1?
> > I would like to get the same results you got except for one
driver
> > module.
> >
> > Best regards,
> >
> > Walter
> >
> >
> >
> >
> >
> >
> >
> > Yahoo! Groups Links
> >
> >
> >
> >
> >
> >
> >
> > .
> >
>
> --
> --------------------------------------------------------------------
------
> Gaisler Research, 1:a Långgatan 19, 413 27 Goteborg, Sweden, +46-
317758650
> fax: +46-31421407 email: info@g..., home page: www.gaisler.com
> --------------------------------------------------------------------
------

Hi Jiri,

I have downloaded the RTEMS 4.6.1 sources.

Now it seems to work.



--- In leon_sparc@yahoogroups.com, "Walter" <thomas.huelsing@t...>
wrote:
>
> Hi Jiri,
>
> the RCC does not include the rtems sources to rebuild rtems.
>
> What do I have to do?
>
>
>
>
>
>
> --- In leon_sparc@yahoogroups.com, Jiri Gaisler <jiri@g...> wrote:
> >
> > There is a Makefile in the src directory of RCC which shows
> > how we configure and build RTEMS.
> >
> > Jiri.
> >
> > Walter wrote:
> > >
> > > Hi Jiri,
> > >
> > > what are the parameters for configure and make to compile RTEMS
> for
> > > the LEON1?
> > > I would like to get the same results you got except for one
> driver
> > > module.
> > >
> > > Best regards,
> > >
> > > Walter
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > Yahoo! Groups Links
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > .
> > >
> >
> > --
> > ------------------------------------------------------------------
--
> ------
> > Gaisler Research, 1:a Långgatan 19, 413 27 Goteborg, Sweden, +46-
> 317758650
> > fax: +46-31421407 email: info@g..., home page: www.gaisler.com
> > ------------------------------------------------------------------
--
> ------

Hallo,

We are working on a project which use the LEON2-FT based ASIC from
ATMEL. The ASIC is currently not available and unfortunately there is
no detailed data sheet findable which describes all the additional
fault tolerance implementations. We don't have the LEON2-FT IP-Core
from ESA including further useful informations.
Therefore I search a EDAC document of the LEON2-FT ASIC or the
LEON2-FT IP Core.

Especially the EDAC configuration of external memory and relevant
register programming are interesting for us because hardware design of
new electronic is in progress. It's possible to enable/disable EDAC
for several external memory areas?

Any ideas or links?

Thx

Thomas

Is the oen signal the inverse of the read signal?

Not completely, but whenever oen is low, read is high.

Jiri.

Leif Granholm wrote:
>
> Is the oen signal the inverse of the read signal?
>
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>
> .
>

Hi.
I am using design_compiler to synthesize leon.
But there are some problems.
When I analyzed debug.vhd, the error is "Empty string constants are
not suppoerted for synthesis on line 206 (VHDL-2159)"

debug.vhd
205: if i = '0' then
206: return("");

So I modified this to

206: return(tost(simm));    -- or other expression.
Then error message is "Object Line not found on line 0 (VHDL-2234)"

I don't understand this error. If you know how to correct this error,
please let me know. I already heard that leon source code is
synthesisable. If I use design_compiler, is there no matter?

Thank you..

debug.vhd should not be synthesised, it is used for simultaion only.
See the file syn/synopsys/leon.dcsh for which files and in which order
they should be synthesised.

Jiri.

kinsman44 wrote:
>
> Hi.
> I am using design_compiler to synthesize leon.
> But there are some problems.
> When I analyzed debug.vhd, the error is "Empty string constants are
> not suppoerted for synthesis on line 206 (VHDL-2159)"
>
> debug.vhd
> 205: if i = '0' then
> 206: return("");
>
> So I modified this to
>
> 206: return(tost(simm));    -- or other expression.
> Then error message is "Object Line not found on line 0 (VHDL-2234)"
>
> I don't understand this error. If you know how to correct this error,
> please let me know. I already heard that leon source code is
> synthesisable. If I use design_compiler, is there no matter?
>
> Thank you..
>
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>
> .
>

Dear everyone,

I am using sparc-rtems-gcc and sparc-rtems-as to compile some programs that was
written in combined C and assembly language.But I do not know how to access the
variable defined in C in assembly language and how to access the variable
defined in assembly language in C? Would someone be kindly to tell me and send
me some examples?


Thanks

Dan Yu





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Hi everyone,

I'm trying to connect 2 16-bits sram(8Mb each) to work as one 32-
bits sram, here is how I connected the signals,

        LEON                                Board
   Address[23 to 2]            AddressA[21 to 0], AddressB[21 to 0]
   Data[31 to 16]              DataA[15 to 0]
   Data[15 to 0]               DataB[15 to 0]
   ramsn[0]                    ramsnA, ramsnB
   ramoen[0]                   ramoenA, ramoenB
   rwen[0]                     rwenA,rwenB
   GND                         rambenA, rambenB

And I was able to get the dsumon recognize the 16Mb 32-bits SRAM
correctly. After downloading a hello.exe (works well on tsim and
another board), I did "verify" and everything is OK. But after
execute it with "run", I get the following message:

IU in error mode (0)
  400011a0 81cd8000 rett %l6

I'm using leon2-1.0.24-xst with mmu and dsu. Anyone has an idea
why this happens? Did I make any mistake in the signal connection?
Thanks very much!

Regards,
fishingfreeee

Hi Jiri,

I guess the console serial ports are in polling mode. If so, how can
I use them with an interrupt handler, or is an interrupt handler for
the console serial ports available?

I would like to run some benchmarks on my Leon2, like for instance the Stanford
(Hennessy)
or the Rhealstone. Up to now I used Dhrystone but I not really satisfied with
it.
Does anyone knows where I can find them?
Thanks,

Michele