I'm finding difficults to understand how can I tell Leon in Cjpeg code informations (path etc...) about the position of initial image ppm file and final jpeg...
Dear Jiri: I have used the code like " a=0x80000210; asm volatile("ld [%0],%%l0"::"r"(a) ); asm volatile("st %%l0,[%0]"::"r"(&t1)); printf("value=%x\n",t1); "...
You have not understod how the MP status register works. There is only one such register, and it indicates how many processors are in the system (bits [31:28])...
hello, LEON2 boots from DSU. I compiled my program with LECCS. with grmon I loaded the file. ... section : my_file.srec at 0x40000000, size 8256 bytes entry...
In the SPARCV8 document is written that "flush address" instruction flushes two consecutive words of cache memory, but in leon this instruction flushes all of...
Diagnostic access to the cache is not possible during a FLUSH operation and will cause a data exception (trap=0x09) if attempted, but in leon this case causes...
Hi we tried to simulate this code: we took "main.dat" and copied it into ram.dat. we run "scirocco" with tbench/tbleon.vhd, and we get the folowing error...
I am not really sure if this is the problem, but a similar error happens when the end of a section is not correctly aligned (in the DAT file). For example: . ....
Hi Jiri: Thank you for your tip. To make sure different CPUs can share a value as we set, which memory address range can be shared by different CPUs safely...
Hi Jiri: I am stilll trying to synchronize all CPUs. I found the reason why I have been stuck is I don't have 100% Coherence mechanism . But since Leon3MP is...
Hi, all I found somthing strange when I finished the whole chip synthesis. According to the web site, leon should be 35K gates using standard confifuration....
I've noticed some odd behaviour related to how gdb handles signals. Just wondering if anyone can clear this up for me. I have compiled run the program below...
BCC stands for bare-c cross-compiler. As such, it does not support file I/O, streams, signals or any other O/S specific feature. The source code of the...
"Hello world" program runs fine with the RTL code. But after the code is synthesised no o/p is observed. Could there be problem with the synthesised netlist? I...
Hello! I tried to synthesize Leon3 (1 processor + DSU + UART + timer + IRQ + ethernet) from grlib 0.16b with ISE 7.1SP1 (Win32 version), but the ISE complains...
The problem is in the prioritize function in irqmp.vhd. Replace it with: function prioritize(b : std_logic_vector(15 downto 1)) return std_logic_vector is ...
Hi; I just finished the synthesis of Leon processor (leon2-1.0.26-xst). area : 3.1mm^2 power : 68mW gate count : 604215 area and power were estimated from...
Hej! Thanks a lot! I did it myself already, but I was more curious why ISE 6.3 doesn't complain about it and ISE 7.1 does... Another issue I found in ISE 7.1...
This is is a problem with the AMBA settings for the number of AHB masters and slaves. You can change lib/grlib/amba/amba.vhd to: constant NAHBMST : integer :=...
Hi all, I'm working with snapgear-p12 and i compiled a dsu image for leon2mmu. I mostly used the default options in xconfig. The board i'm using is xess...
The leon (sparc) stack pointer in in %sp (%o6) in the current register window. There is no explicite stack pointer register in the sparc architecture. Jiri....
The sparc instruction set doesn't have a special register to store the stack pointer. It simply uses one of the regular registers to store the pointer. By...
It could be that Synopsys and/or Cadence has used the area of memories and added it to the gate count. This depends on the parameters in your cell and memory...
Thnx Jiri Which version of ISE are you using? It seems like Leon doesn't get compiled properly while using Synplify Pro and ISE. I'm using 6.2.03i. Amitoj ... ...
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