Hello... I have implemented the leon2-1.0.28-xst in a XILINX XC2V3000-6. The system runs at 48MHz with 2Mbytes SRAM at address 0x40000000. I'm using XILINX ISE...
Hi Sorry, but we have a questions about the modelsim binaries to run make: - Where is the modelsim binaries to run make? - Is it automaticaly load with vhdl...
Modelsim is a very popular (and highly capable) commercial VHDL simulator that is sold by MentorGraphics. See www.model.com. There are multiple versions of the...
Dear Thomas: I use Synplify for synthesis. The result sholuld be more stable than ISE. For VirtexII DCM. DCM CLKFX_MULTIPLIER min = 2 DCM CLKFX_DIVIDE min = 1 ...
Hello Jiri and all, I am currently working with a trainee, who tries to use Xilinx incremental synthesis applied to Leon 2. After many attempts, we finally...
Stephane Davy
stephane.davy@...
Jun 2, 2005 8:08 am
6773
Hello Jiri, hello community, I (that means we) think about an ASIC-implementation of the LEON2. I don't understand all these license-things (like GNU, LPGL,...
Hi, The store instruction always takes an additional cycle to execute. It looks to me that the processor first performs a read at the given address before...
Hello, Read-modify-write sequence is performed on byte and half-word stores if this is enabled in the memory configuration register. This is only needed in...
Edvin Catovic
edvin@...
Jun 2, 2005 3:10 pm
6777
The store instruction takes two clocks to execute, as indicated in the manual. This is because it can you up to three register file values, but the register...
LEON2 is LGPL, which means that you can use it for any purpose you want, including integrating on an ASIC and charge money for it. The only restriction is that...
This is a bug in XST, for sure. There seems to be something magic about the ioport code. I have been told that the new synopsys PRESTO VHDL front-end also...
Hi, I have got a 16-bit flash PROM attached to the bus like this. memo.address[24..1] = flashaddr_pin[23..0] memo/memi.data[31..16] = flashdata_pin[15..0] I do...
Dear all: I am trying to run some program on leon3. The thing is the program have been compiled and it work fine when I set parameter small . But when I try to...
I'm a newbe here... I'm simulating LEON with GRMON software. When running hello.c I could ... grmon[sim]> run resuming at 0x40000000 Program exited normally. ...
Hi all, I found the following "feature" when using the -Os optimization switch with gcc (tried several rtems, bcc until gcc version 3.2.3) : the volatile...
Serge, I think you are wrong here. Note that the branch instruction hs a delayed branch slot, which means that %o0 is reset to the address of testvar: sethi...
Leon2-1.0.29-xst is now available for download from: http://www.gaisler.com/bin/leon2-1.0.29-xst.tar.gz Change log below. Good news is that ISE/XST 7.1.02i can...
grlib-eval-1.0.1 is now available for download from: http://www.gaisler.com/products/grlib/grlib-eval-1.0.1.tar.gz Change log below. Good news is that ISE/XST...
You can download some sample linux images from: http://www.gaisler.com/src/images.tar.bz2 Running the leon2 image should give you an output like: $ tar xjf...
hi all i want to know what is cache snooping? also i do not understand the flush concept and how it is implemented in the memory model. i have read the manual...
Hi all and Hi Jiri I've obtained my leon.db with Synopsys DC. Now i'm evaluating the results of "report area" command of my script. I want to know a medium...
Hi jiri, I have found that Zero flag is set(or remains 1) when there is an overflow in "udivcc" instruction execution and this seems to be wrong,because the...
If the local ram is located in the virtual address space, it would be writeable by all processes and thus not protected. If it would be placed in the physical...
Dear all: I am trying to run some testbench in leon3mp dir with changed clock period. It seem the clock period have some mini value in testbench.vhd. Is it...
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