Hi all I'm realizing my stydy about power estiamtion on Leon. I've realized the forward annotation file in dc_shell and imported it into modelsim by dpfli.so...
Hello, I can't configure LEON3 because of the following error: cd /bin.tkconfig make xconfig gcc -g -c -o tkparse.o tkpars.c tkparse.c: In function 'main' ...
Stéphane Davy
stephane.davy@...
Oct 1, 2005 2:47 pm
7383
Never seen this problem, the tkparse utility is taken straight out of the linux kernel without modifications. Signal 11 seems bad ... Try ./tkparse < config.in...
Hi all I 've a basic doubt. How LEON is better compared to NIOS(ALTERA)/ MICROBLAZE(XILINX), as these are also softcore processors, and they can also be...
Dear Jiri : It's so strange , i just try to program my binary file into GR-PCI-XC2V on board flash , after the programming complete , then i execute "RUN 0"...
Reset the board and try to connect again. If this fails, keep the DSUBRE switch pressed during reset. This will put the cpu in debug mode directly, and you can...
Hi,
the main difference is that LEON source code is under LGPL license and
it is possible to use it free in research, and I think, in comercial
products....
Dear js_corps, ... This kind of symptom occurs if you try to run a program compiled for Leon3 on a Leon2 system (or vice-versa). Since the some of the system ...
Hi all Is the LEON full fledged open source, in the sense, the FPU and associated tools (simulator/debugger) are commercial. Please clarify. Regards Prakash ...
Hi, I'm having the same problem, were you correct it? How? Thanks in advance, José Feiteirinha ... -- A Zen budhist comes up to a hot-dog vender and says: ...
José Feiteirinha
feiteira@...
Oct 3, 2005 5:03 pm
7391
Make sure that your board is correctly programmed, with the DSU uart enabled and correctly connected to the RS232 connector. Before starting grmon, reset the...
Hello, I'm working with a Leon into an actel FPGA. My design works fine, but from some days, I have the following error when I try to connect the DSU: ...
I have tried to use both options (inverted-clock and non inverted-clock), but the result is the same. Today with a new configuration of the memory controller,...
Hi all In an article in EETIMES http://www.us.design-reuse.com/exit/?url=http://www.eetimes.com/news/semi/technology/showArticle.jhtml?articleID=60403130 its...
Hi all i'wondering about the burstcapability of the LEON2. I've read and understood (i think i did :-) the AMBA-standard. When will a burst access be...
Line bursting is done on instruction fetches, not data. Data is loaded with single accesses, or a two-word burst on a double load instruction. Larger data load...
Hi friends, i need your help... i'm trying to compile some examples for my unniversity job at snapgear-p16 but i had problems with sparc-linux-gcc link :( i'm...
Pablo Silva
magoguevarapablo@...
Oct 6, 2005 1:29 pm
7400
Hi Jiri, hi all Thx Jiri for your fast response on my other question, but I've got a new one :-). How many latency-cycles will the memcontroller need for a...
Hi, I just got my evaluation license for SynplifyPro and I'm trying to synthesize the "leon3-ge-hpe-mini" design. I just configured leon with xconfig, then...
~
Oct 6, 2005 3:04 pm
7403
This is a bug in synplify-8.2. The only solution is to go back to 8.1, until Synplicity fixes the problem. I believe other leon3 users have already reported...
Hi, has anyone ever tryied to synthetise Leon é on a Virtex 4? I was thinking about upgrading to it, but I am not sur that Leon will work well there, notably...
Hi Jiri, May you please tell me, in a very few words, the meaning of the registers 'underrun' & 'overrun' in the I cache controler (mmu_icache) ? Thank you...
Hi Jiri and everyone I have a little performance-critical-question about datatransfers from memory to the IU. What will happen when my C-Code will load hugh...
HUH? You are you and why are you sending me this e-mail? Glenda Mock Administrative Associate V Leon County Animal Control glendam@... Phone:...
Glenda Mock
glendam@...
Oct 7, 2005 2:48 pm
7408
The underrun and overrun are states that controls the cache streaming. They indicate whether that cache has supplied to many instructions to the cpu (overrun)...
Simple question: why don't you just compile your program and run it in the VHDL simulator? Or on real hardware if you have an fpga board. You can dump the...
... Thank you very much Mr. Gaisler, Actually I am not modyfing anything inside the caches controller nor any part of Leon. I am just adding a module between...
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