The parport driver in grmon is hardcoded to parport0 as far as I can see in the sources. I will ask Edvin to update this in the next release. We will also...
Thanks Jiri! I'll look forward to the update and stop pulling what's left of my hair out. We are working with several of the boards and it ties up too many...
Hi all, Here I answer your questions, Yes, I have tried it on HW. In fact I haven't simulate it, but "hello world" seems to run properly. When running GRMON it...
Not for the time being. The difference in frequency between the pipeline and external memory is not large enough to justify the use of an L2 cache. An L2 cache...
Hi Jiri, It is on line 156 of file <$GRLIB/lib/gaisler/pci/pcitrace.vhd>, 'rst' is missing from the sensitivity list of comb2 process. By the way, I had 2...
Hello Jiri, To jump to an address, do we only need to set npc and v.pc to a target address and v.branch to '1'. (I am speaking about the signals/variables in...
... Thanks, I have fixed this. ... Yes. ... The project file works with the latest official version of Precision (2005.xxx). Note that precision can generate...
... You're welcome. ... Ok, it makes some things clearer to me... I remember having spent almost 3 weeks trying to understand why the netlist I got from...
On XUP, you it's not safe to run Jtag over 24 MHz, but you can run Ethernet debugging which is a lot faster. The memory chips I'm simulating with are also...
Zhangxi Tan
xtan@...
Oct 2, 2006 8:31 pm
9706
Wow Zhangxi... your questions are too clever for me. The truth is that I didn't pay attention at all to the ddr_clk. I changed the UCF and tried it, and it...
Yes, all modules, UCF, configurations and the whole project file. Thank you. Especially, I'm interested in how you map the UCF. I constrained the design in...
Zhangxi Tan
xtan@...
Oct 3, 2006 7:49 am
9708
Hello Jiri and all, I'm looking for a way to estime the boot (or reboot) time in PROM, necessary for Leon to be ready to execute the first instruction in RAM. ...
Best way to estimate this is to run your code in the TSIM simulator. It will give you the run-time with good accuracy (+- 5%). Make sure you configure it with...
Code size has no obvious correlation with execution time. The execution time depends on how many (and what type of) instruction you must execute, not how large...
Hi all,
I'm currently trying to get the ATA controller to work with a CompactFlash card. On the HPE_mini I was able to access a harddrive without any...
We have seen this behaviour before. I can be solved by power-cycling the CF card *after* it has been inserted in the slot, and before running grmon. On some...
Zhangxi, Can you also send your complete design to me. I’ve been trying to get this ddr controller to work on my XUP for a while now. Thanks a lot. -Adrian ...
I didn't get the source from Ana, because I'm lucky to figure it out myself before I receive the code. I attach two important files here. I hope this will help...
Zhangxi Tan
xtan@...
Oct 4, 2006 12:14 am
9716
Attachments are not allowed on the list to avoid spam and viruses. You can upload the files to the group's file area. Jiri....
Hi it is not clear to me the meaning of the FPNPEN generic in the AHBCTRL module. It not documented in the GRLIB user's manual It seems that when it is not set...
Hello, The fpnpen generic controls the decoding of the AMBA plug&play configuration area. AHB masters and slaves configuration records are decoded by the AHB...
Hi folks, I've created a patch for the latest Grlib1.0.10 to add support for Xilinx XUP boards. A sample design, which is based on leon3mp, is also included in...
Zhangxi Tan
xtan@...
Oct 5, 2006 7:55 am
9720
Hi Jiri,
I added a PNP transistor as you suggested, but I'm still experiencing the same problems. It doesn't even change if I clear the according bit...
Thanks Zhangxi, I will check the patch and apply the relevant parts. I have developed new versions of DDR controllers for 16-, 32- and 64-bit DDR memories ...
Bravo for your adquisition of a XUP board :-D Good thing for many people!! Pitty for me that it didn't happen a year ago :-( but great news anyway. Ana- ...
No, it's connected to the board's reset (which is the default for the ATA connector on the HPE_mini: pin 1 of the ATA connector is the board's reset). I'm...
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