Dear All, I came across an interesting question regarding violation of "restrict assumption". Attached is an example. The answer in this case turns out to be 5...
Hi, We have a standalone streaming video audio recorder based on a design with a pnx1300. The system has 32 Mb RAM onboard. Our latest application requires 64...
Hi Trimedia, We are working on NDK 4.3 when we install NDK4.3 That time dvpMon working fine but now when we try to run Any .out file it just giving error like...
Hi, groups. In my video decoder, I write a function as the following: void GetLumaPredBlock_Case0_16x16(const unsigned char *pRecon_Y, int vec_x, int vec_y,...
hi, I am using the FGPI interface on the PNX1500 to receive video data from an external source(ITU-656). I want to capture two fields by using buffer...
Hello, I have a PCI-JTAG board running in a Windows XP Professional computer. I also have a stand-alone LCP-1500 board with a 2K boot EEPROM in a Media Box,...
Hi Trimedia, Actually we want to disable decoder 7118 So I tried to make changes in BSL like tmbsl7118VdecAna.c and build it successfully Now it should not...
Hi, all. I use lame to encode and decode mp3 data. In my program i use tssa structure:Ai<->lameEncode lameDecode<-> Ao. I use tmosalQueueNameCreate to create...
I have a dual pnx1500 based system that processes input video from 2 video streams to create a 3D display. The display processes video at 640x480. The TSSA...
Hi Trimedia, I am working on LCP1500 [MDS]. On this board i want to enable FGPO and send some data on it's pin VDO_D13 to VDO_D20 I try very hard to do it but...
Hi all, It is said in the optimization document in NDK5.3 that prefetch regions should be saved during the context switch. Does the 1700 version of pSOS LIB...
Hi,groups I want to uodata my lcp-1500 board to lcp-1700.Has MDS provide this service?I can't find any information about this support.Can anyone give me a...
Hi all: My board is a stand alone board,I use saa7104 for VGA output. (NDK4.3,TCS4.51,PNX1501E,64MB DDR SDRAM.) I notice that tmvencAna_open cann't be called...
Hi Trimedia, After stallation of MPTK 20 exWmt comlipile and give exWmt.out We run WMV file with the help of DvpMon i works fine . But i have to change out put...
Hi all, when I use "build_exe apps/HelloWorld" on LCP1500 Board,where can I find it compiles every .c of each "comp" ,I want to know how it use tmcc and use...
Hi ,all I'm confused with these sentences as below: int *buf = (int *)_cache_malloc(SZBUF*sizeof(int));where SZBUF is 16; assume , the region where buf points...
Hi, all. Could anyone tell me how to get vld libaray from NDK4.3? I tried vld example in tcs folder,but it does not run. Could anyone tell me how to get vld...
Hi, Yet another audio problem on the PNX1500. What seems to happen is that after running for some time, typically several hours, AI aborts DMA traffic, at an...
Hi ,All Yesterday , I have asked this question, and thanks for your reply! An engineer who works at philips tells me that is a way to decrease the D cache...
I'm working on a new board, on which only pnx1500,DDR RAM£¬ decoder,encoder and audio chips included. Now the board could work on a win2000 machine with ASUS...
Hi groups, I am writing a test code for USB host controller which base on PCI card, this card is plug into PCI-XIO slot of Mediabox (PNX1500). I want to...
Hi, NDK 4.3, pnx1500. We're tyring to use tmMemDbg to find some memoryleaks we are heaving. I noticed tmMemDbg seems to have a feature that it can actually...
I'm working on an application where the I2S signals of the PNX1500 are used to implement an audio delay. Audio samples (32-bit stereo, 32 kHz sample rate) are...
I'm trying to creat a bsl for my board following the steps in the ApplicationNotes-Creating a bsl for a board, more than that, I build my own video and audio...
The board which design by myself is consist of PNX1502+FLASH+DDR+Video D/A+Audio D/A+Ethernet PHY¡£ My board input 12V DC,The 3.3V,2.5V,1.2V is convent from...
Hello, On the PNX1502, within L1, I noticed when performing an XIO 16-bit read access, that actually 2 read cycles were issued over the XIO bus: a first access...
