------------------------------------------------------------
EDAA PhD Forum 2009 - Call for Submissions
------------------------------------------------------------

EDAA PhD Forum 2009

Call for Submissions

   The PhD forum is part of the DATE Conference and hosted by the
European Design
Automation Association (EDAA).   The PhD Forum is a great
opportunity for PhD
students to present their thesis work to a broad audience in the
system design
and design automation community from both industry and academia.
The PhD Forum
may also help students to establish contacts for entering the job
market. In
addition, representatives from industry and academia get a glance of
state-of-the-art in system design and design automation.
Eligibility
Students who

     * have finished their PhD thesis within the last 12 months or
     * students who are close to finishing to their thesis work can
present their
work at the PhD forum.

   Benefits

- a poster presentation in A0 format at the DATE PhD Forum

- contacts to professionals from industry and academia

- possibility to distribute flyers summarizing the PhD work

- possibility to apply for EDAA travel grants once the PhD thesis is
accepted
for presentation at the PhD Forum

- a (free) dinner reception

Submission

Send an e-mail to Peter [dot] Marwedel [at] tu-dortmund [dot] de
with the
subject line "DATE PhD Forum", containing:

- full contact address, with affiliation, phone, fax

- a 1-page extended abstract describing the novelties and advantages
of the
thesis work of not more than 800 words (PDF). The abstract should
also include
name and affiliation. Figures may be included as far as the 1-page
limit is not
exceeded.


- either (a) a University-approved thesis proposal (PDF) or (b) one
published
paper (PDF)


Important dates

- Submission deadline: 1st December, 2008

- Notification of acceptance: 17th January, 2009

- Presentation at DATE: 20 April, 2008

Contact

   Peter Marwedel    http://ls12-www.cs.tu-dortmund.de/~marwedel
[1]   EDAA is a
non-profit association. Its purpose is to operate for educational,
scientific
and technical purposes for the benefit of the international
electronics design
and design automation community. The Association, in the field of
design and
design automation of electronic circuits and systems, promotes a
series of high
quality technical international conferences and workshops across
Europe and
cooperates actively to maintain harmonious relationships with other
national and
international technical societies and groups promoting the purpose
of the
Association. EDAA is the main sponsor of DATE, the premier Design,
Automation
and Test Conference and Exhibition in Europe.   http://www.edaa.com
[2]

--
Click here to unsubscribe from this newsletter [3]


[1] http://ls12-www.cs.tu-dortmund.de/~marwedel
[2] http://www.edaa.com/
[3] http://www.date-
conference.com/newsletter/confirm/remove/bd334630376999t1
EDAA PhD Forum 2009 - Call for Submissions
EDAA PhD Forum 2009

Call for Submissions

The PhD forum is part of the DATE Conference and hosted by the
European Design Automation Association (EDAA).

The PhD Forum is a great opportunity for PhD students to present
their thesis work to a broad audience in the system design and
design automation community from both industry and academia.

The PhD Forum may also help students to establish contacts for
entering the job market. In addition, representatives from industry
and academia get a glance of state-of-the-art in system design and
design automation.

Eligibility

Students who
have finished their PhD thesis within the last 12 months or
students who are close to finishing to their thesis work can present
their work at the PhD forum.
Benefits
- a poster presentation in A0 format at the DATE PhD Forum

- contacts to professionals from industry and academia

- possibility to distribute flyers summarizing the PhD work

- possibility to apply for EDAA travel grants once the PhD thesis is
accepted for presentation at the PhD Forum

- a (free) dinner reception

Submission

Send an e-mail to Peter [dot] Marwedel [at] tu-dortmund [dot] de
with the subject line "DATE PhD Forum", containing:

- full contact address, with affiliation, phone, fax

- a 1-page extended abstract describing the novelties and advantages
of the thesis work of not more than 800 words (PDF). The abstract
should also include name and affiliation. Figures may be included as
far as the 1-page limit is not exceeded.



- either (a) a University-approved thesis proposal (PDF) or (b) one
published paper (PDF)



Important dates

- Submission deadline: 1st December, 2008

- Notification of acceptance: 17th January, 2009

- Presentation at DATE: 20 April, 2008

Contact

Peter Marwedel

http://ls12-www.cs.tu-dortmund.de/~marwedel

EDAA is a non-profit association. Its purpose is to operate for
educational, scientific and technical purposes for the benefit of
the international electronics design and design automation
community. The Association, in the field of design and design
automation of electronic circuits and systems, promotes a series of
high quality technical international conferences and workshops
across Europe and cooperates actively to maintain harmonious
relationships with other national and international technical
societies and groups promoting the purpose of the Association. EDAA
is the main sponsor of DATE, the premier Design, Automation and Test
Conference and Exhibition in Europe.

http://www.edaa.com

Dear Colleague,

Attached you will find the information about IDT 2008 - a conference
being held in Tunisia. IDT 2008 is sponsored by the IEEE Computer
Society Test Technology Technical Council
(TTTC) and technically co-sponsored by the IEEE Circuits & Systems
Society. Moreinformation about IDT 2008 can be found at:

http://www.enis.rnu.tn/tttc-idt


=================

Dear colleague,

Following the demand of several colleagues, the submission deadline
of IDT'08 is extended to 9 October 2008. Thank you for updating your
schedule according to this date. We want to encourage you to
participate by submitting papers.

Please find attached the last call for papers for diffusion.

We want also to encourage you to organize special sessions. This may
be a great opportunity to meet other colleagues and share ideas and
experiences.

Feel free to ask any questions; please do not hesitate to get in
contact.

Thank you again for contribution in making the IDT'08 a success and
we look forward to meeting you in Monastir.

Best regards.
Mohamed

Dear All,

Pictures from recent VSI events are available from the following links:

1. Three-day workshop on DSP and Embedded Systems (Hyderabad):
http://vlsi-india.org/vsi/photos/2008/dsp-EmbSys08_hyd/index.html

2. Four-day course on Design-for-Testability: http://vlsi-
india.org/vsi/photos/2008/dct-dft08_hyd/index.html

3. Three-day workshop on Analog Design (Jadavpur): http://vlsi-
india.org/vsi/photos/2008/analog08_jad/index.html

Photographs from VDAT will become available soon.

Regards

Ravikumar

Dear All,

Prof. Cecilia Metra, Program Chair, VTS-2009, has sent the Call for Papers for
this event. This is a premier event of the IEEE in the area of VLSI Test. I
encourage you to submit your papers.

Regards

Ravikumar

=======================
Prof. Cecilia Metra
(VTS-09 Program Chair)
ARCES - DEIS - University of Bologna
Viale Risorgimento 2
40136 Bologna
Tel: + 39 051 209 3038
Fax: + 39 051 209 3073
Email: cecilia.metra@...

=====================================================================
=============
     CALL FOR PAPERS - ASP JOURNAL OF LOW POWER ELECTRONICS - Vol. 5,
N° 1, APRIL 2009
=====================================================================
=============

Dear Colleague,

You are kindly invited to submit your work for the next issue of the
ASP Journal of Low Power Electronics (JOLPE). JOLPE is exclusively
focused on emerging research activities in the fields of low power
electronics including low-power high performance electronic systems
and design, low-power VLSI systems, low-power testing, architectures
for low power devices and components, simulation of low power
electronic systems, algorithmic transformations and caching, low-
power mapping for logics, power reduction through energy reuse,
rapid thermal processing, parallel algorithms, tools and techniques
for power estimation and management, etc., etc. Broadly speaking all
aspects of low-power electronics are covered. For more details,
please visit the JOLPE website at http://www.aspbs.com/jolpe/

You are kindly requested to submit original research (fundamental or
applied research aspects) articles. Please submit your manuscript
directly to me and provide a list of 5 referees (with their complete
mailing address and email) who could be contacted for reviewing your
manuscript. When preparing your manuscript, please follow the
journal style guidance and make your paper "ready for publication"
(all details, notes, appendix, figures, images, etc. must be
provided in the submitted version of the manuscript). Instructions
for authors are available at http://www.aspbs.com/jolpe/

The deadline for submitting your manuscript to JOLPE Vol. 5, N° 1 is
October 15, 2008. Notification of acceptance will be sent on January
2009. Accepted papers will be published in April 2009.

You are kindly advised to read Journal of Low Power Electronics
policy and also the uniform requirements for manuscripts submission.
You are encouraged to submit high quality original research work
that has not been published or nor under consideration by other
journals or conference proceedings elsewhere. You should submit
manuscript electronically as a PDF file to:

Patrick GIRARD
Laboratory of Informatics, Robotics, and Microelectronics of
Montpellier (LIRMM)
161 rue Ada, 34392 Montpellier cedex 05, FRANCE
Email: girard@...

I look forward to receiving your contribution !!!

With my best regards,

Patrick GIRARD
Editor-in-Chief
ASP Journal of Low Power Electronics

=====================================================================
=========================
PLEASE RECOMMEND JOLPE FOR SUBSCRIPTION TO YOUR LIBRARY - details
can be found at http://www.aspbs.com/jolpe/
=====================================================================
=========================

EDITORIAL BOARD OF JOLPE:
E. Acar, IBM Research Labs., USA
A. J. Acosta, University of Sevilla, Spain
B.M. Al-Hashimi, University of Southampton, UK
M.H. Anis, University of Waterloo, CA
M. Ansorge, EPFL and University of Neuchatel, Switzerland
M. J. Bellido, University of Sevilla, Spain
L. Benini, University of Bologna, Italy
E. I. Boemo, University of Madrid UAM, Spain
M. Chan, Hong Kong Univ. of Science & Technology, China
N. Chang, Seoul National University, South Korea
K. Choi, Seoul National University, South Korea
V. De, Intel Corp., USA
W. Dehaene, KU Leuven, Belgium
J. Figueras, UPC Barcelona, Spain
E. G. Friedman, University of Rochester, USA
A. García-Ortiz, Anafocus, Spain
E. Guidetti, STMicroelectronics Inc., Switzerland
J. Haid, Infineon Technologies, Austria
J. Henkel, University of Karlsruhe, Germany
M. Hirech, Synopsys Inc., USA
T. Ishihara, Kyushu University, Japan
N. Jha, Princeton University, USA
J. Kim, Seoul National University, South Korea
M.J. Kumar, Indian Institute of Technology, Delhi, India
A.K. Jones, University of Pittsburgh, USA
J. D. Legat, UC Louvain, Belgium
P. Li, Texas A&M University, USA
X. Li, Chinese Academy of Sciences, Beijing, China
C. Lichtenau, IBM Research Labs., Germany
E. Macci, Politecnico di Torino, Italy
Y. Manoli, University of Freiburg, Germany
M. Miranda, IMEC, Belgium
K. Muhammad, Texas Instruments, USA
V. Narayanan, Pennsylvania State University, USA
S. Nazarian, Magma Design Automation, USA
W. Nebel, University of Oldenburg, Germany
B. Nikolic, University of California at Berkeley, USA
V.G. Oklobdzija, University of Texas at Dallas, USA
R. Panda, Freescale Semiconductor Inc., USA
B.C. Paul, Toshiba America Research, USA
M. Pedram, University of Southern California, USA
F. Pessolano, NXP Semiconductors, The Netherlands
P. Petrov, University of Maryland, USA
C. Piguet, CSEM, Switzerland
A. Raghunathan, NEC Labs, USA
C.P. Ravikumar, Texas Instruments, India
M. Renaudin, TIMA, France
K. Roy, Purdue University, USA
R. Sankaralingam, Cadence Design Systems, USA
M. Sarrafzadeh, UCLA, USA
O. Sentieys, ENSSAT University of Rennes, France
W. A. Serdijn, Delft University of Technology, The Netherlands
L. Shang, University of Colorado at Boulder, USA
R. Singh, Clemson University, USA
D. Soudris, National Technical University of Athens, Greece
M.R. Stan, University of Virginia, USA
E. Talpes, AMD Inc., USA
J. P. Teixeira, INESC, Portugal
N. A. Touba, University of Texas at Austin, USA
T. Tuan, Xilinx Research Labs., USA
A. Tyagi, Iowa State University, USA
K. Uchiyama, Hitachi, Ltd., Japan
G.-Y. Wei, Harvard University, USA
P. Wong, Stanford University, USA
H. J. Wunderlich, University of Stuttgart, Germany
S. Yoo, Postech University, South Korea
H. Yu, Berkeley Design Automation, Inc., USA

Dear Colleague,

Centre for Development of Advanced Computing, Hyderabad, is
organizing the following programs :

1. A National Workshop on Ubiquitous Computing – "Ubicomp India
2008" with experts delivering talks from R&D and Academia
Institutions which include Amrita University, IISc, IIM and C-DAC on
September 5, 2008 at Hotel Katriya De Royal, Balayogi Parayatak
Bhavan, Begumpet, Hyderabad.

2. A Tutorial on "Analog VLSI Filters and Mixed Signal Design"
with Dr
P V Ananda Mohan, Executive Director, ECIL, Bangalore as the Key
Speaker on September 12, 2008 at Hotel Kamat Lingapore, Begumpet,
Hyderabad.

More details of the above programs are available from CDAC
Hyderabad. Please contact Mahesh Patil of CDAC Hyderabad at
ubicomp@....

CDAC Hyderabad website will also have more information.

Regards

C.P. Ravikumar

Dear Colleague,

VLSI Society of India is happy to announce a three-day workshop on "DSP
and Embedded Systems" at Hyderabad, India during August 18-20, 2008.
The workshop is being organized by VSI Chapter at VNR VJIET (VNR Vigyana
Jyoti Institute of Engineering and Technology) in cooperation with VNR
VJIET and CDAC Hyderabad.

The three-day program includes talks from experts coming from
semiconductor industry as well as academia. The program is suitable for
industry professionals working in the areas of DSP and Embedded Systems,
faculty members who teach related courses, and students from ECE and
related disciplines. The forum offers a unique opportunity to learn from
practicing professionals and to interact with them.

The detailed technical program of the workshop and the registration form
can be downloaded from the following website:

http://vlsi-india.org/vsi/download/events/2008/dspEmbSys-hyd-aug08.pdf
<http://vlsi-india.org/vsi/download/events/2008/dspEmbSys-hyd-aug08.pdf>

If you require assistance with local accommodation or have queries about
registration or the venue etc., please contact one of the following
faculty members:

1. Ms Roji Marjorie - roji_marjorie@... (Ph: 09866324881) or

2. Mr. Balaji Narayanam - narayanamb@... (Ph: 9848115663)

Regards,

C.P. Ravikumar

Acknowledgements:

* Prof. C.D. Naidu of VNR VJIET and his team and Dr. Sarat Chandra
Babu of CDAC Hyderabad for the organization of the workshop
* Semiconductor Companies (Texas Instruments, ARM, Gill Instruments,
Arithos, and Cranes Software) for supporting the event.

--- End forwarded message ---

Dear Colleague,

The VLSI Society of India is happy to announce a 4-day short course on
"Digital Circuits Test and Design for Testability" during Aug 11-14,
2008.

Details of the course and registration are available from the website
below. If you have difficulty accessing the website, write to
vsisecy@... <mailto:vsisecy@... for a soft copy
of the program. The course is suitable for working professionals,
faculty, and students. The faculty for the course are:

a) Prof. S.M. Reddy, University of Iowa

b) Dr. Nilanjan Mukherjee, Mentor Graphics

c) Dr. C.P. Ravikumar, Texas Instruments India


http://vlsi-india.org/vsi/download/events/2008/dct-dft-hyd-aug08.pdf
<http://vlsi-india.org/vsi/download/events/2008/dct-dft-hyd-aug08.pdf>

Online registration is available.

Regards

Ravikumar

--- End forwarded message ---

Dear All,

We received 120 responses to our survey on what would attract more Indian students to do Ph.D. in VLSI/related fields,  26% of the respondents feel that better salaries would attract more students. 30% of the respondents feel that better recognition for Ph.D. from the industry would help. 18% felt that better infrastructure in institutions will help. Details of the poll are given below. If you have not voted, you can still do!

Regards

Ravikumar

==========

Dear All,

This is a reminder about VDAT 2008 which starts on July 23 in
Bangalore. Please note the following:

1. The venue is Wipro's Learning Center, Electronics City,
Bangalore. Entry is from Gate 7. You are required to carry a photo
identification with you so that security will permit you entry. Once
you enter the campus, the registration booth is located close to
Gate 7. On all days, registration is available from 8.00 AM.
Breakfast is organized for participants from 8.15 AM - 9.15 AM on
all days.

When you approach the registration desk, there will be separate
queues for fellows and delegates. Please inform the registration
desk if you are pre-registered and provide your name and
organization information. If you are a fellow, please produce the
letter and a photo-id from your college. Sign in the registration
list and collect the coupons.  There is a banquet on July 25. Please
inform the registration desk if you do not wish to attend the
banquet. Please note that your registration is not transferable.

2. A bus is organized from IISc (Library) for participants who are
staying at Hoysala Guest House. Others who are starting from the
same area can also board the bus at IISc. Please note that the bus
leaves at 7.00 AM to reach the venue by 8.00 AM. Mini-vans are
organized from RVCE Boys' and Girls' hostels to leave at 7.00 AM for
participants who are staying at these hostels.

3. Spot registration will be available on all days. Please pay by
cash or DD. If you are from Bangalore, cheques will also be
accepted. Receipts for payments will be available from the
registration desk during lunch/coffee breaks.

4. If you are coming by train/air, please plan your local transport
well. Bangalore airport is located about 40 km from the heart of the
city. Similarly, the route to electronics city gets congested if you
leave during peak traffic hours. We strongly recommend that you plan
to come before 8.15 AM.

5. While inside the venue, please wear your badge at all times and
ensure you are within the premises of VDAT venue.

6. Please switch off your mobiles and do not use them inside the
auditorium. Use the networking opportunities and interact with other
participants during breaks.

7. If you are an author and have submitted your PPT to us, it would
be loaded on the PC in the auditorium. If not, you are requested to
load your presentation during the breaks.

8. The technical program has been put together with a lot of effort.
Look at the latest version of the technical program on our website -
http://vlsi-india.org . There are a number of interesting tutorials,
paper presentations and panel discussions. Please participate
actively in the sesions by asking questions in the time allotted for
Q&A.

Looking forward to meet you in person!

C.P. Ravikumar
On behalf of VDAT 2008 committee

Dear Colleague,

VLSI Society of India is happy to announce a three-day workshop on "DSP and Embedded Systems"  at Hyderabad, India during August 18-20, 2008. The workshop is being organized by VSI Chapter at VNR VJIET (VNR Vigyana Jyoti Institute of Engineering and Technology) in cooperation with VNR VJIET and CDAC Hyderabad. 

The three-day program includes talks from experts coming from semiconductor industry as well as academia. The program is suitable for industry professionals working in the areas of DSP and Embedded Systems, faculty members who teach related courses, and students from ECE and related disciplines. The forum offers a unique opportunity to learn from practicing professionals and to interact with them.

The detailed technical program of the workshop and the registration form can be downloaded from the following website:

http://vlsi-india.org/vsi/download/events/2008/dspEmbSys-hyd-aug08.pdf

If you require assistance with local accommodation or have queries about registration or the venue etc., please contact one of the following faculty members:

1. Ms Roji Marjorie -  roji_marjorie@... (Ph: 09866324881) or

2. Mr. Balaji Narayanam - narayanamb@... (Ph: 9848115663)

Regards,

C.P. Ravikumar

Dear All,

Please note that July 15 is the last date to indicate your preference for accommodation when you attend VDAT 2008.

Please visit http://vlsi-india.org/events/vdat2008/accommodation.shtml 

As of today, rooms are still available in IISc Hoysala Guest House.  Post July 15, we will assign the accommodation to faculty and students.  If space is available in IISc Guest House, we may provide the same to research scholars and female students on a priority basis. We cannot make any changes to the assignment. Also, any requests coming after July 15 cannot be entertained. Please ensure that your request comes in before July 15, 5.00 pm IST.

Regards,

Ravikumar

Dear Colleague,

The VLSI Society of India is happy to announce a 4-day short course on "Digital Circuits Test and Design for Testability" during Aug 11-14, 2008.

Details of the course and registration are available from the website below. If you have difficulty accessing the website, write to vsisecy@... for a soft copy of the program. The course is suitable for working professionals, faculty, and students. The faculty for the course are:

a) Prof. S.M. Reddy, University of Iowa

b) Dr. Nilanjan Mukherjee, Mentor Graphics

c) Dr. C.P. Ravikumar, Texas Instruments India

http://vlsi-india.org/vsi/download/events/2008/dct-dft-hyd-aug08.pdf

Online registration is available. 

Regards

Ravikumar

Enter your vote today!  A new poll has been created for the
vdat group:

According to you, what would attract more people into Indian Ph.D. programs in
the areas related to VLSI?

   o Better salaries to research students
   o Better research infrastructure in the institutions
   o Better publicity to research programs
   o Better recognition for Ph.D. from the industry
   o Better recognition for Ph.D. from the academic institutions
   o Better chances for admission to Ph.D. programs
   o Other reasons not listed above - send email


To vote, please visit the following web page:
http://groups.yahoo.com/group/vdat/surveys?id=2729765

Note: Please do not reply to this message. Poll votes are
not collected via email. To vote, you must go to the Yahoo! Groups
web site listed above.

Thanks!

Moderator: C.P. Ravikumar (Texas Instruments)

Panelists: Jaswinder Ahuja (India Semiconductor Association/Cadence),  S. Karthik (Analog Devices India), Manav Subodh (Intel India), N.S. Murty (NXP Semiconductors), A. Vasudevan (Wipro)

The semiconductor industry in India has come a long way in the past 20 years. Design companies have moved up from library cell design and characterization to full system-on-chip designs. CAD companies have moved from a predominantly "service-provider" mode to software product and IP development. Several start-up companies have also sprung up and some have achieved a degree of success. Some companies have also ventured into development of embedded systems. Sourcing the right talent for the growing semiconductor industry, retaining this talent, and growing the talent have been challenges the industry has faced for several reasons:

• Confusing array of undergraduate and postgraduate programs (Electrical, Electronics, Communications, IT,

Computer and permutations) with major overlaps in content

• Unstructured campus placement (rush to get talent young, confusion between "IT" and semiconductor,

improper talent matching

• Lowered entry bar for educational institutions in USA/Europe

• Exalted expectations in compensation

• Unrealistic expectations in work

• Lack of "soft skills"

• Lacking eco-system for growth

The panelists will examine these issues and hint at how they have attempted to solve some of the problems in their own ways. While some of these problems can be attacked independently, collective community effort is needed to address the others - the panel will initiate a debate in this direction.

The panel will provide opportunties for students and faculty to raise questions

Dear Colleague,

On July 24, 2008, there are two important panel discussions at VDAT 2008.

(1) Creating more Ph.D. holders in Cutting Edge Technologies

July 24 - At VDAT 2008 (Wipro Learning Center, Electronics City, Bangalore)

Prof. Dipankar Nagchoudhuri,  Dinesh Sharma, G.S.Visweswaran, and Mr Sham Banerji are among the panelists.

Panel -

Dear All,

The correct link you must follow for confirming your preference for accommodation is:

http://vlsi-india.org/events/vdat2008/accommodation.shtml 

Regards

Ravikumar

Dear All,

Registrations for VDAT 2008 is now open - fellows must ensure that they are registered latest by today (June 30). If you are facing any difficulties, please let vsisecy@... know immediately.

Participants are expected to make their own accommodation arrangements. However, the VDAT 2008 committee may be able to offer limited accommodation at college hostels/guest-houses on a paid-basis.  Please see the following link and intimate us by filling out a web-enabled form.

http://vlsi-india.org/events/vdat2008/accommodation-1.shtml

Please do this as soon as possible, no later than July 10. You must abide by the rules and regulations of the hostels.

Bus pick-ups and drops will be made from the three venues indicated (IISc Bangalore, RVCE Boys Hostel, RVCE Girls Hostel, and PESSE Boys Hostel). If you stay at other venues, we request you to make your own arrangements towards travel to/from the venue.

Regards

C.P. Ravikumar

--- In vdat@yahoogroups.com, "c_p_ravikumar" <cpravikumar@...> wrote:


Dear Colleague,

VLSI Society of India is happy to announce a one-day tutorial on "Design
for Manufacturability."  The tutorial will be conducted by Prof. Sandip
Kundu at Bangalore on July 7, 2008.

Date - July 7, 2008

Venue - Hotel Capitol, Bangalore (near Raj Bhavan)

Targeted audience: Practicing engineers, students and faculty.

Sandip Kundu is Professor of Electrical and Computer Engineering at the
University of Massachusetts, Amherst. Previously he was at Intel
Corporation (till January 2005). Prior to joining Intel, he was a member
of the research staff at the IBM T. J. Watson Research Laboratory
(1988-1997). He has published over 100 papers, holds 12 patents and has
given 18 tutorials in forums such as ICCAD, EDAC, DATE, ASP-DAC, ATS,
ETW and ITC. Sandip has also been in numerous program committees
including DAC, ICCAD, DATE and ICCD. He was the technical program chair
for ICCD 2000, general chair in 2001. He was the general chair of VLSI
conference in India in 2005. He is currently a Distinguished Visitor of
IEEE ComputerSociety, fellow of IEEE and an Associate Editor of IEEE
Transactions on VLSI. Previously, he was an associate editor of IEEE
Transactions on Computers.
More details of the tutorial can be found at:
http://vlsi-india.org/vsi/download/events/2008/dfm-blr-july08.pdf
<http://vlsi-india.org/vsi/download/events/2008/dfm-blr-july08.pdf>
If you are unable to access the file, you may write to
vsisecy@... <mailto:vsisecy@...  for a copy.
We hope you will benefit from this tutorial!   Regards   C.P. Ravikumar

--- End forwarded message ---

Dear Colleague,

The advance program for VDAT 2008 is now available at

http://vlsi-india.org/events/vdat2008/advprg08.pdf 

If you have difficulty accessing the website, please write to vsisecy@... and request for a softcopy of the advance program. Please forward this mail to your colleagues who may be interested.

The program includes excellent keynote talks, invited talks, peer-reviewed papers, poster papers, and panel discussions. VDAT is also an excellent forum for students, faculty, and industry to interact.

Registrations are now open! In addition to sending the application form and DD, you must also do an online registration in order to receive a confirmation and updates.

Fellowships have also been announced on the website.  We will also keep updating the website with information on options for accommodation in Bangalore city, especially in the Electronics City area.  Please check the website for updates.

Authors must check the advance program and ensure that the names of the authors/coauthors are correctly provided and that the speaker is correctly identified. Speakers will be given certificates and any corretions to the names must be indicated immediately. Authors must upload their powerpoint presentations to the website early so that the session chairs can provide feedback.

Please register early and plan your travel in advance.

Regards,

C.P. Ravikumar

International Symposium
                          on Low Power Electronics and Design 2008
                      National Science Seminar Complex, Indian Institute of
Science
                                               Bangalore, India
                                          http://www.islped.org/
                                            August 11-13, 2008
                               Hotel Registration Deadline June 26, 2008
                               Early Registration Deadline July 10, 2008

The technical program includes,
- 6 Plenary talks by leaders in Industry/Academia
- 2 Panels
- 12 Paper sessions
- 1 Poster session
- Several embedded tutorials

Please see http://www.islped.org/program08.pdf for the compelete technical
program.

Registrations are filling up ... Please note that there are limited
number of seats.


--- In vdat@yahoogroups.com, "c_p_ravikumar" <cpravikumar@...> wrote:


Dear Colleague,

VSI is happy to announce a two-week long workshop on Custom LSI
Design exclusive for faculty and students. This is the third in the
series of Custom LSI Design Workshops (CLDW) organized by VSI for
academic fraternity. We have scheduled this back-to-back with VDAT
2008 so that participants can benefit from both events.

VDAT 2008 - July 23-26, Bangalore

CLDW 2008 - July 28 - Aug 8, Koodalasangama, near Bagalkot

CLDW 2008 will be cooordinated by Dr Mahant Shetti (KarMic). The
technical program will center around a hands-on project, but will
also include some expert lectures. This is an intensive workshop and
demands serious participation. The feedback from the participants
for the past two workshops has been overwhelming. We encourage you
to register early. The organizers will apply selection criteria to
shortlist participants. Please note that you must be a
student/faculty at the time of the workshop to qualify. Participants
of the workshop will have an opportunity to present the summary of
their work as a paper in one of the future VSI events and/or VSI
VISION. Selected participants will also be awarded fellowship at
VDAT 2008.

Koodalasangama is a tourist spot in Karnataka and at the end of of
the workshop, the participants have the option of a guided tour to
places of historical interest near Bagalkot.

For details of registration, refer to the following website:

http://vlsi-india.org/vsi/download/events/2008/CLDW2008.pdf

Information about the venue may be found from:

http://vlsi-india.org/vsi/activities/2008/cldw-kar-
july08/How_to_Reach_Kudalsangam.pdf (PDF 17 KB)

http://vlsi-india.org/vsi/activities/2008/cldw-kar-july08/cldw08-
sightseeing.zip (ZIP 1.10 MB)

If you have difficulties in accessing the websites, you can also
download them from http://tech.groups.yahoo.com/group/vdat/files

If you still face difficulties, write an email to vsisecy@vlsi-
india.org and request for the registration information.

Regards

C.P. Ravikumar

--- End forwarded message ---

Dear all,

VDAT 2008 steering committee invites all organizations to exhibit their products/technologies in the VDAT symposium in Bangalore on July 25th and 26th. Details of the symposium can be found at http://vlsi-india.org/events/vdat2008/index.shtml

We can offer 3mx3m stalls for a cost of Rs 20K/- per day (Rs 40K for both days) on July 25, 26. Booths will be erected on July 24 evening and will be available to exhibitors early morning of July 25. Exhibitors can also distribute brochures to participants.

Cheques/drafts must be made payable to "VLSI Design and Test Symposium 2008", payable in Bangalore and must be sent to Gopal Naidu, treasurer, Texas Instruments India, Bagmane Tech Park, CV Raman Nagar, Bangalore 560093

Interested exhibitors are requested to contact the Sponsorship Chair, N.S.Murty, at vdat-sponsor@... for confirmation and/or any further details.

Thanks & Regards,

Dr. N.S.Murty
Director - Technology Management
NXP Semiconductors India Pvt. Ltd.
Information Technology Park, Nagawara Village,
Kasaba Hobli, Bangalore 560 045,
Tel: 91-80-40247747; Mobile: 91-9845070134

The information contained in this message is confidential and may be legally privileged. The message is intended solely for the addressee(s). If you are not the intended recipient, you are hereby notified that any use, dissemination, or reproduction is strictly prohibited and may be unlawful. If you are not the intended recipient, please contact the sender by return e-mail and destroy all copies of the original message.

Dear Colleague,

The 12th VLSI Design & Test Symposium (VDAT 2008) is scheduled in
Bangalore during July 23-26. The program includes:

July 23 - Tutorials (Three tutorials, T1, T2, and T3 are scheduled
concurrently and you may register for any one. These are in the
areas of wireless communication/RF Design, Low Power Design, and
Design Verification)

July 24 - VLSI Education Day (Includes keynote talks, embedded
tutorials, panel discussions)

July 25, 26 - VDAT Symposium (Includes keynote talks, embedded
tutorials, invited talks, panel discussions, paper presentations)
Special sessions are planned on emerging topics like Biomedical
Applications.

Registrations are now open! Please visit:
http://vlsi-india.org/events/vdat2008/vdat08-registration.pdf
to download a form. Please follow the instructions provided there.
If you have difficulty downloading, please write to vsisecy@vlsi-
india.org for a copy. For those who wish to register for a tutorial,
you must clearly indicate which tutorial you wish to attend (T1, T2,
T3).

You must also do an online registration so that you will receive a
confirmation and receive regular updates:
http://vlsi-india.org/register.htm

Regards

Ravikumar

Dear Colleague,

VLSI Society of India is happy to announce a one-day tutorial on "Design for Manufacturability."  The tutorial will be conducted by Prof. Sandip Kundu at Bangalore on July 7, 2008. 

Date - July 7, 2008

Venue - Hotel Capitol, Bangalore (near Raj Bhavan)

Targeted audience: Practicing engineers, students and faculty.

VSI Updates - May 2008

1. A three-day workshop on Power Management is planned in Mysore
(SJCE, Mysore, June 3-5) is planned. Please visit the VSI website
for details. If you have difficulties, please write to vsisecy@vlsi-
india.org

2. A three-day workshop on Analog Interfacing and System Design is
planned at Kolkata (Jadavpur University, June 16-18). More
information
on the event is available from the VSI website. If you are unable to
locate the information, write to us.

3. A two-week long summer workshop on Custom LSI Design for faculty
and students (CLDW 2008) is planned during July 28 - Aug 8, 2008
(Koodalasangama, Karnataka). Please visit our website for further
details.

4. VDAT 2008 will be held in Bangalore (July 23 - 26, 2008). The
advance program is under construction and will be announced soon.
Only July 23, we plan 3 tutorials (RF Design, Low Power,
Verification). VLSI Education Day (July 24, 2008) will feature
invited talks, embedded tutorials, panel discussion, and poster
papers. The program during July 25-26 will feature regular papers,
short papers, invited talks, and a panel discussion. Please plan
your participation and travel early. Fellowship application deadline
is June 2, 2008.

5. We are still accepting submissions for the July/August issue
of "VSI VISION" and the last date for submission is June 2, 2008. We
are looking for

a) Journal articles which highlight research contributions - these
will
be peer-reviewed. The last date for submission for this issue in May
15.
Send your submission to ravikumar@...
<mailto:ravikumar@...>  in PDF format.  The manuscript must
be in double spaced, single column format and must be about 10 pages
long in 10-point Times-Roman font.

b) General articles on the topic of VLSI education/research/industry
in
India.

c) Information about publications/patents originating from India
during
the past 6 months in the areas of VLSI/related technologies.

6. Your one-year memberships taken in 2007 have expired. If you have
not
already done so, please renew your memberships.  Please note that 5-
year
memberships are also available. Membership forms can be downloaded
from
http://vlsi-india.org/vsi/download/forms/vsi-membership-form.pdf
<http://vlsi-india.org/vsi/download/forms/vsi-membership-form.pdf>



Regards,

C.P. Ravikumar

Secretary, VSI