Hai, Have anyone tried implementing a polynomial equation in verilog. If so how is it done. How do you read an image into an verilog module and use its...
Hello, I am new to this group and to Verilog, however I have a problem which I have been working for three days trying to solve. I have a simple state machine...
Hello! I would have a few things to ask: First of all does anyone have some verilog code for a java processor (such as MIC4 or whatever), I could use some,...
Hi friends, I was just thinking that what are the responsibilities of the verilog preprocessor.And should it be a seperate component or its responsibilities...
hi, Can anyone tell me where i can find an efficient implementation of floating point inverse calculation program or algorithm. I just want to find inverse of...
Have you checked opencores.org? Regards, Trampas ... From: debu_4 [mailto:debu_4@...] Sent: Thursday, May 29, 2003 11:51 AM To: verilog@yahoogroups.com ...
hi, i am working on a project 'modulation and demodulation of BPSK signal' in verilog. modulation wasn't very tough (we used look up table). the tough part is...
Hi there, Has anyone worked on coding and implementation of complex mathematical functions like “FFT (Fast Fourier Transform)” & “Correlation” on FPGA....
hi, I was just noting down the things I have to do in the case of performing Semantic checks for the verilog language. Can anyone help me in telling what will...
... guide u wht can u do for this purpose bcoz he is phd in microcontroller ... __________________________________ Do you Yahoo!? SBC Yahoo! DSL - Now only...
Hi All, I am using SpartanII device for a PCI based I/O card. My question is Do I have to use a PCI bridge to interface the FGPA I/O pins with the PCI...
Hello all, I am relatively a new user of modelsim simulator as far as VHDL is concerned.I have some few questions for which I would like clarification and...
amar desai
amar2077@...
Jul 15, 2003 1:53 pm
165
Hello All, can anyone tell me what are the majorand minor parameters that usually go in when we decide the clock frequency of a perticular Design... example...
amar desai
amar2077@...
Jul 22, 2003 2:40 pm
166
Hi all, I am working on "Implementation of Serpent algorithm on an FPGA" in Handel-C for my dissertation in M.S and for that i need the verilog code for ...
Hi Folks, I am working on conversion of a legacy schematic into verilog. Require help in the usage of the Viewdraw tool for viewing of the Schematics. Have...
hiii.. iam kiran,new to this group...i need help in writing the verilog code for the attached ckt,.. thanx in advance... ... Do you Yahoo!? Yahoo! SiteBuilder...
Note: forwarded message attached. hi i hope the code posted would be usful for designing in verilog "i hope some one posts fir filter sample code plz people...
hi all, this is doc i found while searching for verilog code for designing fir filter. i hope it is quite usful to u !! plz people share ur filter verilog code...
Hi All, I have done PG Diploma in VLSI Design from C-DAC and looking for an break is it possible to do some thing? Ramesh kommineni <kommineni911@...>...
Hello there, I'm new to this group as well as to Verilog programming.I have a question regarding the "WIRE" and "REG" variable of it, ie is there any intuitive...
Faisal, wires are like interconnects (in between logic gates...everything is a wire, if not something else)..and any variable which is having a value assigned...
Hello friends, my name is kannan and I am working as vlsi design engg. at chennai. Now I want verilog coding for usart or uart model, can anyone have that....
... question regarding the "WIRE" and "REG" variable of it, ie is there any intuitive way to remember where to use "wire" and where to use "reg"?coz i get...
hi can u help me in finding some good examples for writing research proposal related signal processing architecture in VLSI. also if u can tell me some current...
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