He everybody Thanks for reading my email. I have to imlement dsPIC series microcontroller on FPGA in verilog and test its functionality. I have to complret...
Hi Group, I am a beginner in verilog. I was going through one verilog program and I found the following module in that program. ... module FFtc (slaveOut,...
hi dheeraj, There are two distinct phases in your project. I. You want to implement Microcontroller (Flow of this phase is - Design, COde and synthesis and...
Hi, can any body tell me about the free ebooks websites about Verilog HDL. Plz USMAN HAI ... Do you Yahoo!? Yahoo! Small Business $15K Web Design Giveaway -...
Hello everybody I am doing a projects of implementing dsPIC30F microcontroller on FPGA. I know i hyave to desig a controller and a datapath. Datap[ath could be...
Hello. I need help about generation sine wave on using FPGA. I m trying CORDIC algo. Can any one suggests more efficient ALGO which req less memory and give...
Hai, Go to www.andraka.com, u can find the cordic algorithm. The person has defined the algorithm very well. Sriram Usman Hai <engr_usmanhai@...> wrote: ...
hi everyone, I have to do a semester project and have to make something using verilog. Now the problem is that I dont have Ideas that what to do..I know I can...
Hi How bout implementing a RISC Processor on board.. dheraj bilal habshi <bhabshi@...> wrote: hi everyone, I have to do a semester project and have to...
Hi all I have to imlement harvard RISC microcontroller with two stage pipeline. If anybody knows how to do this in verilog ro how shoulld i draw that state...
Hi Dheeraj, Coincidentally my project is also the same. I am also in same type of dilemma. So anyone please suggest us how to proceed us this project... Thank...
Hi All, Sorry about recent delays in approving membership - I accidently blocked my yahoo forwarding whem I improved my spam blocking. For new members: Check...
Hi, Anybody know the book which is excellent in Digital Video Decoder Hardware design and its Digital filters design. Or I am very great full to you ...If you...
Hi Guys.. i have serious doubts though very basic are contradicting to what i know. and i wana cross verify them .. in places of formulas i wud appreciate if u...
Hi everybody!! I am implementing a DSP core on board....this core supports Modulo and bit reversed addressing .......Can anybody explain me how to do this in...
Hello, I m trying to design ROM (no particulars) using verilog. Can any one provide me its code for study. regards. USMAN HAI ... Do you Yahoo!? Win a $20,000...
dear all, I have to develop a bubblesort embedded system that will run on a VIRTEX-II Microblaze Development Kit board. This system must prompt the user via...
HIII.. DESIGNING ROM IS SIMPLE.JUST U DESIGN A ARRAY WHOSE DEPTH DEPENDS ON THE MEMORY CAPACITY. GOODBYE ... Do you Yahoo!? Win a $20,000 Career Makeover at...
HII GUYS I AM FRESHER JUST FINISHED MY ENGG IN ECE. CAN ANY OF U GUIDE ME TO SELECT A COLLEGE TO PROCEED MY HIGHER STUIDIES IN VLSI IN INDIA... Usman Hai...
Hi, CAN ANY ONE PROVIDE SIMPLEST SOLUTION OF DESIGNING NUMERIC CONTROLL OSCILLATOR ON FPGA. ITS BASICALLY DSP RELATED. THANKS USMAN HAI ... Do you Yahoo!? ...
hi all, i'm first time taking the verilog course. and have the project which is release candy @ 35c and return 15c in nickel only if 50c is entered. How can i...
HI all...can anybody explain me how to design verilog hardware for mapping memory . I have a 16-bit bus to be which is to be mapped to different registers and...
HI all...can anybody explain me how to design verilog/vhdl hardware for mapping memory . I have a 16-bit bus to be which is to be mapped to different registers...
First try defining a state machine, and identify your signals. I would assume you have such signals as clock, coin_value_x1_paid, coin_value_x2_paid,...., and...
hii ,, i am fresh graduate. i want to join master degree in vlsi. can any body help me to choose good universities in india. Yahoo! India Matrimony: Find your...
Hi all I am having a trouble with one of the verilogXl netlisting options(Generate PinMap option).. this option is not generating the right pinmap ... I will...
hi, i m doing MTech. in "MICROELECTRONICS" at IIT bombay. For VLSI it's a really good institute to be in, also staff here is quite good. On that, placements...
Dear Friends, I am very thankful, If any one have any idea or have a material on FIR comb, FIR low pass, FIR Notch filter design. I am very greatful to you if...
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