i m a new member.actually i wanna ask abt the generate command and therelated command like degenrate genvar etc.veriwell is not recognizing these commands. so...
Our client, a World leader in Visual Computing Technology is seeking System Engineer for their operations in Bangalore. The incumbent is expected to guide,...
Are you using VeriWell? I haven't maintained it in about 7 years, so it will not have 2001 features, like Generate. Anyone else still using VeriWell? I...
thanks alot Elliot for ur response.so what should i do.i should be working n veriwell or some other good software.actually i wanna do my final year project in...
... I hope that's not the same software Synapticad is selling for a minimum of $1,500 per copy!? See: http://xrl.us/g59s If so, I hope you're getting...
SynaptiCAD's simulator started with VeriWell, but I imagine it has been heavily modified by now. I am considering making VeriWell open source. It is a classic...
Can -you help- me in replacing -for loops -with if_else statements or counters code with for loop for(a=63;a>=16;a=a-1) begin //message4[a=63]inverted //takes...
hi fareha well first all i would like to tell u that always avoid using for loops coz it may cause probs during synthesis. 2ndly try this change if(a>=16) ...
Thanks alot I'll check and see if these changes work,is there any software which can automatically generate state machine and block diagrams from verilog...
hi fakeha well yes u can generate fsm using xilinx, aldec or altera's max plus II i dunno abt FPGA advantage.............its model sim i think. and yes when u...
Hi Mona firstly i was using xilinx ISE 6.2 ,i wrote my verilog code but when i tried to synthesize the code i received errors (low virtual memory)now i thought...
Hi all, I am facing lots of problem in ASIC and FPGA design Flow. Prob1, in ASIC design Flow where layout preparation comes into the picture . Prob2. How...
Hi, Please click on the link below and enter your birthday for me. I am creating a birthday calendar for myself. Don't worry it is quick, and you don't have to...
Dear Friends I am working on a design where i have a basic clock of 50MHz. i have generated another clock of 14KHz from this 50MHz. Now i want to introduce a...
Our MNC Client, a worldwide leader in Graphics and Digital Media is seeking top-notch Systems Engineers(Senior & Leads) for their Bangalore Software...
Our MNC Client, a worldwide leader in Graphics and Digital Media is seeking top-notch Systems Engineers(Senior & Leads) for their Bangalore Software...
hi plz can anyone tell me about the opennings for freshers??????? thank u verilog@yahoogroups.com wrote: There are 2 messages in this issue. Topics in this...
Wanted Embedded System Engineers for our MNC client in Bangalore. Hi, We have immediate requirements for Embedded System Engineers for our MNC client in...
AoA currently we are working on iris detction using wavlets, in the end we want to implement these algo on FPGA( verilog ), is there are some thses chips...
hiiii dear friends i m final year student of E&C and want to make project in VHDL. if anybody have any good project telated with this.please send it to ...
Hi gurleen!! I feel the tools from MAGMA or CADENCE will be able to solve your problem. regards, sandip gurleen arora <aroragurleen@...> wrote: Hi all, I...
Hi try to design 128 bit adder Essam ... Essam __________________________________________________________ Find your next car at http://autos.yahoo.ca...
hi u cud do something on signal processing.....lots of stuff man....u cud try designing a speech recognition module or even a speech codec or somethng to do...
Hi, We are an HR Consulting Company, working with some of the big-wigs of IT (Mostly American and European MNCs) in India. One of them, a Global No.1 in...
Wanted Embedded C with RTOS developers in Bangalore. Hi, We have immediate requirements for Embedded C with RTOS developers for our client in Bangalore. ...
Wanted Symbian Engineer (C, C++) in Korea. Hi, We have immediate requirements for Symbian Engineer (C, C++) for our client in Korea. Primary Skills : * at...
Opening for C++ with Java programmers in Bangalore. Hi, We have immediate requirements for C++ with Java programmers for our MNC client in Bangalore. Skillset...
Opening for Embedded C++ with JAVA experienced programmers in Bangalore. Hi, We have immediate requirements for Embedded C++ with Java, XML experienced...
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